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  1. /*
  2. * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/delay.h>
  35. #include <linux/slab.h>
  36. #include <linux/compat.h>
  37. #ifdef CONFIG_NET_RX_BUSY_POLL
  38. #include <net/busy_poll.h>
  39. #endif
  40. #include <linux/list.h>
  41. #include <linux/if_ether.h>
  42. #include <dev/mlx4/driver.h>
  43. #include <dev/mlx4/device.h>
  44. #include <dev/mlx4/cmd.h>
  45. #include <dev/mlx4/cq.h>
  46. #include <sys/sockio.h>
  47. #include <sys/sysctl.h>
  48. #include "en.h"
  49. #include "en_port.h"
  50. NETDUMP_DEFINE(mlx4_en);
  51. static void mlx4_en_sysctl_stat(struct mlx4_en_priv *priv);
  52. static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv);
  53. #ifdef CONFIG_NET_RX_BUSY_POLL
  54. /* must be called with local_bh_disable()d */
  55. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  56. {
  57. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  58. struct net_device *dev = cq->dev;
  59. struct mlx4_en_priv *priv = netdev_priv(dev);
  60. struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
  61. int done;
  62. if (!priv->port_up)
  63. return LL_FLUSH_FAILED;
  64. if (!mlx4_en_cq_lock_poll(cq))
  65. return LL_FLUSH_BUSY;
  66. done = mlx4_en_process_rx_cq(dev, cq, 4);
  67. #ifdef LL_EXTENDED_STATS
  68. if (likely(done))
  69. rx_ring->cleaned += done;
  70. else
  71. rx_ring->misses++;
  72. #endif
  73. mlx4_en_cq_unlock_poll(cq);
  74. return done;
  75. }
  76. #endif /* CONFIG_NET_RX_BUSY_POLL */
  77. #ifdef CONFIG_RFS_ACCEL
  78. struct mlx4_en_filter {
  79. struct list_head next;
  80. struct work_struct work;
  81. u8 ip_proto;
  82. __be32 src_ip;
  83. __be32 dst_ip;
  84. __be16 src_port;
  85. __be16 dst_port;
  86. int rxq_index;
  87. struct mlx4_en_priv *priv;
  88. u32 flow_id; /* RFS infrastructure id */
  89. int id; /* mlx4_en driver id */
  90. u64 reg_id; /* Flow steering API id */
  91. u8 activated; /* Used to prevent expiry before filter
  92. * is attached
  93. */
  94. struct hlist_node filter_chain;
  95. };
  96. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  97. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  98. {
  99. switch (ip_proto) {
  100. case IPPROTO_UDP:
  101. return MLX4_NET_TRANS_RULE_ID_UDP;
  102. case IPPROTO_TCP:
  103. return MLX4_NET_TRANS_RULE_ID_TCP;
  104. default:
  105. return MLX4_NET_TRANS_RULE_NUM;
  106. }
  107. };
  108. static void mlx4_en_filter_work(struct work_struct *work)
  109. {
  110. struct mlx4_en_filter *filter = container_of(work,
  111. struct mlx4_en_filter,
  112. work);
  113. struct mlx4_en_priv *priv = filter->priv;
  114. struct mlx4_spec_list spec_tcp_udp = {
  115. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  116. {
  117. .tcp_udp = {
  118. .dst_port = filter->dst_port,
  119. .dst_port_msk = (__force __be16)-1,
  120. .src_port = filter->src_port,
  121. .src_port_msk = (__force __be16)-1,
  122. },
  123. },
  124. };
  125. struct mlx4_spec_list spec_ip = {
  126. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  127. {
  128. .ipv4 = {
  129. .dst_ip = filter->dst_ip,
  130. .dst_ip_msk = (__force __be32)-1,
  131. .src_ip = filter->src_ip,
  132. .src_ip_msk = (__force __be32)-1,
  133. },
  134. },
  135. };
  136. struct mlx4_spec_list spec_eth = {
  137. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  138. };
  139. struct mlx4_net_trans_rule rule = {
  140. .list = LIST_HEAD_INIT(rule.list),
  141. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  142. .exclusive = 1,
  143. .allow_loopback = 1,
  144. .promisc_mode = MLX4_FS_REGULAR,
  145. .port = priv->port,
  146. .priority = MLX4_DOMAIN_RFS,
  147. };
  148. int rc;
  149. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  150. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  151. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  152. filter->ip_proto);
  153. goto ignore;
  154. }
  155. list_add_tail(&spec_eth.list, &rule.list);
  156. list_add_tail(&spec_ip.list, &rule.list);
  157. list_add_tail(&spec_tcp_udp.list, &rule.list);
  158. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  159. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  160. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  161. filter->activated = 0;
  162. if (filter->reg_id) {
  163. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  164. if (rc && rc != -ENOENT)
  165. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  166. }
  167. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  168. if (rc)
  169. en_err(priv, "Error attaching flow. err = %d\n", rc);
  170. ignore:
  171. mlx4_en_filter_rfs_expire(priv);
  172. filter->activated = 1;
  173. }
  174. static inline struct hlist_head *
  175. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  176. __be16 src_port, __be16 dst_port)
  177. {
  178. unsigned long l;
  179. int bucket_idx;
  180. l = (__force unsigned long)src_port |
  181. ((__force unsigned long)dst_port << 2);
  182. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  183. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  184. return &priv->filter_hash[bucket_idx];
  185. }
  186. static struct mlx4_en_filter *
  187. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  188. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  189. __be16 dst_port, u32 flow_id)
  190. {
  191. struct mlx4_en_filter *filter = NULL;
  192. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  193. if (!filter)
  194. return NULL;
  195. filter->priv = priv;
  196. filter->rxq_index = rxq_index;
  197. INIT_WORK(&filter->work, mlx4_en_filter_work);
  198. filter->src_ip = src_ip;
  199. filter->dst_ip = dst_ip;
  200. filter->ip_proto = ip_proto;
  201. filter->src_port = src_port;
  202. filter->dst_port = dst_port;
  203. filter->flow_id = flow_id;
  204. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  205. list_add_tail(&filter->next, &priv->filters);
  206. hlist_add_head(&filter->filter_chain,
  207. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  208. dst_port));
  209. return filter;
  210. }
  211. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  212. {
  213. struct mlx4_en_priv *priv = filter->priv;
  214. int rc;
  215. list_del(&filter->next);
  216. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  217. if (rc && rc != -ENOENT)
  218. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  219. kfree(filter);
  220. }
  221. static inline struct mlx4_en_filter *
  222. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  223. u8 ip_proto, __be16 src_port, __be16 dst_port)
  224. {
  225. struct mlx4_en_filter *filter;
  226. struct mlx4_en_filter *ret = NULL;
  227. hlist_for_each_entry(filter,
  228. filter_hash_bucket(priv, src_ip, dst_ip,
  229. src_port, dst_port),
  230. filter_chain) {
  231. if (filter->src_ip == src_ip &&
  232. filter->dst_ip == dst_ip &&
  233. filter->ip_proto == ip_proto &&
  234. filter->src_port == src_port &&
  235. filter->dst_port == dst_port) {
  236. ret = filter;
  237. break;
  238. }
  239. }
  240. return ret;
  241. }
  242. static int
  243. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  244. u16 rxq_index, u32 flow_id)
  245. {
  246. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  247. struct mlx4_en_filter *filter;
  248. const struct iphdr *ip;
  249. const __be16 *ports;
  250. u8 ip_proto;
  251. __be32 src_ip;
  252. __be32 dst_ip;
  253. __be16 src_port;
  254. __be16 dst_port;
  255. int nhoff = skb_network_offset(skb);
  256. int ret = 0;
  257. if (skb->protocol != htons(ETH_P_IP))
  258. return -EPROTONOSUPPORT;
  259. ip = (const struct iphdr *)(skb->data + nhoff);
  260. if (ip_is_fragment(ip))
  261. return -EPROTONOSUPPORT;
  262. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  263. return -EPROTONOSUPPORT;
  264. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  265. ip_proto = ip->protocol;
  266. src_ip = ip->saddr;
  267. dst_ip = ip->daddr;
  268. src_port = ports[0];
  269. dst_port = ports[1];
  270. spin_lock_bh(&priv->filters_lock);
  271. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  272. src_port, dst_port);
  273. if (filter) {
  274. if (filter->rxq_index == rxq_index)
  275. goto out;
  276. filter->rxq_index = rxq_index;
  277. } else {
  278. filter = mlx4_en_filter_alloc(priv, rxq_index,
  279. src_ip, dst_ip, ip_proto,
  280. src_port, dst_port, flow_id);
  281. if (!filter) {
  282. ret = -ENOMEM;
  283. goto err;
  284. }
  285. }
  286. queue_work(priv->mdev->workqueue, &filter->work);
  287. out:
  288. ret = filter->id;
  289. err:
  290. spin_unlock_bh(&priv->filters_lock);
  291. return ret;
  292. }
  293. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  294. {
  295. struct mlx4_en_filter *filter, *tmp;
  296. LIST_HEAD(del_list);
  297. spin_lock_bh(&priv->filters_lock);
  298. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  299. list_move(&filter->next, &del_list);
  300. hlist_del(&filter->filter_chain);
  301. }
  302. spin_unlock_bh(&priv->filters_lock);
  303. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  304. cancel_work_sync(&filter->work);
  305. mlx4_en_filter_free(filter);
  306. }
  307. }
  308. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  309. {
  310. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  311. LIST_HEAD(del_list);
  312. int i = 0;
  313. spin_lock_bh(&priv->filters_lock);
  314. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  315. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  316. break;
  317. if (filter->activated &&
  318. !work_pending(&filter->work) &&
  319. rps_may_expire_flow(priv->dev,
  320. filter->rxq_index, filter->flow_id,
  321. filter->id)) {
  322. list_move(&filter->next, &del_list);
  323. hlist_del(&filter->filter_chain);
  324. } else
  325. last_filter = filter;
  326. i++;
  327. }
  328. if (last_filter && (&last_filter->next != priv->filters.next))
  329. list_move(&priv->filters, &last_filter->next);
  330. spin_unlock_bh(&priv->filters_lock);
  331. list_for_each_entry_safe(filter, tmp, &del_list, next)
  332. mlx4_en_filter_free(filter);
  333. }
  334. #endif
  335. static void mlx4_en_vlan_rx_add_vid(void *arg, struct net_device *dev, u16 vid)
  336. {
  337. struct mlx4_en_priv *priv = netdev_priv(dev);
  338. struct mlx4_en_dev *mdev = priv->mdev;
  339. int err;
  340. int idx;
  341. if (arg != priv)
  342. return;
  343. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  344. set_bit(vid, priv->active_vlans);
  345. /* Add VID to port VLAN filter */
  346. mutex_lock(&mdev->state_lock);
  347. if (mdev->device_up && priv->port_up) {
  348. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  349. if (err)
  350. en_err(priv, "Failed configuring VLAN filter\n");
  351. }
  352. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  353. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  354. mutex_unlock(&mdev->state_lock);
  355. }
  356. static void mlx4_en_vlan_rx_kill_vid(void *arg, struct net_device *dev, u16 vid)
  357. {
  358. struct mlx4_en_priv *priv = netdev_priv(dev);
  359. struct mlx4_en_dev *mdev = priv->mdev;
  360. int err;
  361. if (arg != priv)
  362. return;
  363. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  364. clear_bit(vid, priv->active_vlans);
  365. /* Remove VID from port VLAN filter */
  366. mutex_lock(&mdev->state_lock);
  367. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  368. if (mdev->device_up && priv->port_up) {
  369. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  370. if (err)
  371. en_err(priv, "Failed configuring VLAN filter\n");
  372. }
  373. mutex_unlock(&mdev->state_lock);
  374. }
  375. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  376. int qpn, u64 *reg_id)
  377. {
  378. int err;
  379. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  380. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  381. return 0; /* do nothing */
  382. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  383. MLX4_DOMAIN_NIC, reg_id);
  384. if (err) {
  385. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  386. return err;
  387. }
  388. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, (long long)*reg_id);
  389. return 0;
  390. }
  391. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  392. unsigned char *mac, int *qpn, u64 *reg_id)
  393. {
  394. struct mlx4_en_dev *mdev = priv->mdev;
  395. struct mlx4_dev *dev = mdev->dev;
  396. int err;
  397. switch (dev->caps.steering_mode) {
  398. case MLX4_STEERING_MODE_B0: {
  399. struct mlx4_qp qp;
  400. u8 gid[16] = {0};
  401. qp.qpn = *qpn;
  402. memcpy(&gid[10], mac, ETH_ALEN);
  403. gid[5] = priv->port;
  404. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  405. break;
  406. }
  407. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  408. struct mlx4_spec_list spec_eth = { {NULL} };
  409. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  410. struct mlx4_net_trans_rule rule = {
  411. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  412. .exclusive = 0,
  413. .allow_loopback = 1,
  414. .promisc_mode = MLX4_FS_REGULAR,
  415. .priority = MLX4_DOMAIN_NIC,
  416. };
  417. rule.port = priv->port;
  418. rule.qpn = *qpn;
  419. INIT_LIST_HEAD(&rule.list);
  420. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  421. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  422. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  423. list_add_tail(&spec_eth.list, &rule.list);
  424. err = mlx4_flow_attach(dev, &rule, reg_id);
  425. break;
  426. }
  427. default:
  428. return -EINVAL;
  429. }
  430. if (err)
  431. en_warn(priv, "Failed Attaching Unicast\n");
  432. return err;
  433. }
  434. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  435. unsigned char *mac, int qpn, u64 reg_id)
  436. {
  437. struct mlx4_en_dev *mdev = priv->mdev;
  438. struct mlx4_dev *dev = mdev->dev;
  439. switch (dev->caps.steering_mode) {
  440. case MLX4_STEERING_MODE_B0: {
  441. struct mlx4_qp qp;
  442. u8 gid[16] = {0};
  443. qp.qpn = qpn;
  444. memcpy(&gid[10], mac, ETH_ALEN);
  445. gid[5] = priv->port;
  446. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  447. break;
  448. }
  449. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  450. mlx4_flow_detach(dev, reg_id);
  451. break;
  452. }
  453. default:
  454. en_err(priv, "Invalid steering mode.\n");
  455. }
  456. }
  457. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  458. {
  459. struct mlx4_en_dev *mdev = priv->mdev;
  460. struct mlx4_dev *dev = mdev->dev;
  461. int index = 0;
  462. int err = 0;
  463. int *qpn = &priv->base_qpn;
  464. u64 mac = mlx4_mac_to_u64(IF_LLADDR(priv->dev));
  465. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  466. IF_LLADDR(priv->dev));
  467. index = mlx4_register_mac(dev, priv->port, mac);
  468. if (index < 0) {
  469. err = index;
  470. en_err(priv, "Failed adding MAC: %pM\n",
  471. IF_LLADDR(priv->dev));
  472. return err;
  473. }
  474. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  475. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  476. *qpn = base_qpn + index;
  477. return 0;
  478. }
  479. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
  480. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  481. if (err) {
  482. en_err(priv, "Failed to reserve qp for mac registration\n");
  483. mlx4_unregister_mac(dev, priv->port, mac);
  484. return err;
  485. }
  486. return 0;
  487. }
  488. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  489. {
  490. struct mlx4_en_dev *mdev = priv->mdev;
  491. struct mlx4_dev *dev = mdev->dev;
  492. int qpn = priv->base_qpn;
  493. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  494. u64 mac = mlx4_mac_to_u64(IF_LLADDR(priv->dev));
  495. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  496. IF_LLADDR(priv->dev));
  497. mlx4_unregister_mac(dev, priv->port, mac);
  498. } else {
  499. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  500. priv->port, qpn);
  501. mlx4_qp_release_range(dev, qpn, 1);
  502. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  503. }
  504. }
  505. static void mlx4_en_clear_uclist(struct net_device *dev)
  506. {
  507. struct mlx4_en_priv *priv = netdev_priv(dev);
  508. struct mlx4_en_addr_list *tmp, *uc_to_del;
  509. list_for_each_entry_safe(uc_to_del, tmp, &priv->uc_list, list) {
  510. list_del(&uc_to_del->list);
  511. kfree(uc_to_del);
  512. }
  513. }
  514. static void mlx4_en_cache_uclist(struct net_device *dev)
  515. {
  516. struct mlx4_en_priv *priv = netdev_priv(dev);
  517. struct mlx4_en_addr_list *tmp;
  518. struct ifaddr *ifa;
  519. mlx4_en_clear_uclist(dev);
  520. if_addr_rlock(dev);
  521. CK_STAILQ_FOREACH(ifa, &dev->if_addrhead, ifa_link) {
  522. if (ifa->ifa_addr->sa_family != AF_LINK)
  523. continue;
  524. if (((struct sockaddr_dl *)ifa->ifa_addr)->sdl_alen !=
  525. ETHER_ADDR_LEN)
  526. continue;
  527. tmp = kzalloc(sizeof(struct mlx4_en_addr_list), GFP_ATOMIC);
  528. if (tmp == NULL) {
  529. en_err(priv, "Failed to allocate address list\n");
  530. break;
  531. }
  532. memcpy(tmp->addr,
  533. LLADDR((struct sockaddr_dl *)ifa->ifa_addr), ETH_ALEN);
  534. list_add_tail(&tmp->list, &priv->uc_list);
  535. }
  536. if_addr_runlock(dev);
  537. }
  538. static void mlx4_en_clear_mclist(struct net_device *dev)
  539. {
  540. struct mlx4_en_priv *priv = netdev_priv(dev);
  541. struct mlx4_en_addr_list *tmp, *mc_to_del;
  542. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  543. list_del(&mc_to_del->list);
  544. kfree(mc_to_del);
  545. }
  546. }
  547. static void mlx4_en_cache_mclist(struct net_device *dev)
  548. {
  549. struct mlx4_en_priv *priv = netdev_priv(dev);
  550. struct mlx4_en_addr_list *tmp;
  551. struct ifmultiaddr *ifma;
  552. mlx4_en_clear_mclist(dev);
  553. if_maddr_rlock(dev);
  554. CK_STAILQ_FOREACH(ifma, &dev->if_multiaddrs, ifma_link) {
  555. if (ifma->ifma_addr->sa_family != AF_LINK)
  556. continue;
  557. if (((struct sockaddr_dl *)ifma->ifma_addr)->sdl_alen !=
  558. ETHER_ADDR_LEN)
  559. continue;
  560. tmp = kzalloc(sizeof(struct mlx4_en_addr_list), GFP_ATOMIC);
  561. if (tmp == NULL) {
  562. en_err(priv, "Failed to allocate address list\n");
  563. break;
  564. }
  565. memcpy(tmp->addr,
  566. LLADDR((struct sockaddr_dl *)ifma->ifma_addr), ETH_ALEN);
  567. list_add_tail(&tmp->list, &priv->mc_list);
  568. }
  569. if_maddr_runlock(dev);
  570. }
  571. static void update_addr_list_flags(struct mlx4_en_priv *priv,
  572. struct list_head *dst,
  573. struct list_head *src)
  574. {
  575. struct mlx4_en_addr_list *dst_tmp, *src_tmp, *new_mc;
  576. bool found;
  577. /* Find all the entries that should be removed from dst,
  578. * These are the entries that are not found in src
  579. */
  580. list_for_each_entry(dst_tmp, dst, list) {
  581. found = false;
  582. list_for_each_entry(src_tmp, src, list) {
  583. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  584. found = true;
  585. break;
  586. }
  587. }
  588. if (!found)
  589. dst_tmp->action = MLX4_ADDR_LIST_REM;
  590. }
  591. /* Add entries that exist in src but not in dst
  592. * mark them as need to add
  593. */
  594. list_for_each_entry(src_tmp, src, list) {
  595. found = false;
  596. list_for_each_entry(dst_tmp, dst, list) {
  597. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  598. dst_tmp->action = MLX4_ADDR_LIST_NONE;
  599. found = true;
  600. break;
  601. }
  602. }
  603. if (!found) {
  604. new_mc = kmalloc(sizeof(struct mlx4_en_addr_list),
  605. GFP_KERNEL);
  606. if (!new_mc) {
  607. en_err(priv, "Failed to allocate current multicast list\n");
  608. return;
  609. }
  610. memcpy(new_mc, src_tmp,
  611. sizeof(struct mlx4_en_addr_list));
  612. new_mc->action = MLX4_ADDR_LIST_ADD;
  613. list_add_tail(&new_mc->list, dst);
  614. }
  615. }
  616. }
  617. static void mlx4_en_set_rx_mode(struct net_device *dev)
  618. {
  619. struct mlx4_en_priv *priv = netdev_priv(dev);
  620. if (!priv->port_up)
  621. return;
  622. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  623. }
  624. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  625. struct mlx4_en_dev *mdev)
  626. {
  627. int err = 0;
  628. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  629. priv->flags |= MLX4_EN_FLAG_PROMISC;
  630. /* Enable promiscouos mode */
  631. switch (mdev->dev->caps.steering_mode) {
  632. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  633. err = mlx4_flow_steer_promisc_add(mdev->dev,
  634. priv->port,
  635. priv->base_qpn,
  636. MLX4_FS_ALL_DEFAULT);
  637. if (err)
  638. en_err(priv, "Failed enabling promiscuous mode\n");
  639. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  640. break;
  641. case MLX4_STEERING_MODE_B0:
  642. err = mlx4_unicast_promisc_add(mdev->dev,
  643. priv->base_qpn,
  644. priv->port);
  645. if (err)
  646. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  647. /* Add the default qp number as multicast
  648. * promisc
  649. */
  650. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  651. err = mlx4_multicast_promisc_add(mdev->dev,
  652. priv->base_qpn,
  653. priv->port);
  654. if (err)
  655. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  656. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  657. }
  658. break;
  659. case MLX4_STEERING_MODE_A0:
  660. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  661. priv->port,
  662. priv->base_qpn,
  663. 1);
  664. if (err)
  665. en_err(priv, "Failed enabling promiscuous mode\n");
  666. break;
  667. }
  668. /* Disable port multicast filter (unconditionally) */
  669. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  670. 0, MLX4_MCAST_DISABLE);
  671. if (err)
  672. en_err(priv, "Failed disabling multicast filter\n");
  673. }
  674. }
  675. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  676. struct mlx4_en_dev *mdev)
  677. {
  678. int err = 0;
  679. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  680. /* Disable promiscouos mode */
  681. switch (mdev->dev->caps.steering_mode) {
  682. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  683. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  684. priv->port,
  685. MLX4_FS_ALL_DEFAULT);
  686. if (err)
  687. en_err(priv, "Failed disabling promiscuous mode\n");
  688. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  689. break;
  690. case MLX4_STEERING_MODE_B0:
  691. err = mlx4_unicast_promisc_remove(mdev->dev,
  692. priv->base_qpn,
  693. priv->port);
  694. if (err)
  695. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  696. /* Disable Multicast promisc */
  697. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  698. err = mlx4_multicast_promisc_remove(mdev->dev,
  699. priv->base_qpn,
  700. priv->port);
  701. if (err)
  702. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  703. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  704. }
  705. break;
  706. case MLX4_STEERING_MODE_A0:
  707. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  708. priv->port,
  709. priv->base_qpn, 0);
  710. if (err)
  711. en_err(priv, "Failed disabling promiscuous mode\n");
  712. break;
  713. }
  714. }
  715. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  716. struct net_device *dev,
  717. struct mlx4_en_dev *mdev)
  718. {
  719. struct mlx4_en_addr_list *addr_list, *tmp;
  720. u8 mc_list[16] = {0};
  721. int err = 0;
  722. u64 mcast_addr = 0;
  723. /*
  724. * Enable/disable the multicast filter according to
  725. * IFF_ALLMULTI and IFF_PROMISC:
  726. */
  727. if (dev->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) {
  728. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  729. 0, MLX4_MCAST_DISABLE);
  730. if (err)
  731. en_err(priv, "Failed disabling multicast filter\n");
  732. /* Add the default qp number as multicast promisc */
  733. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  734. switch (mdev->dev->caps.steering_mode) {
  735. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  736. err = mlx4_flow_steer_promisc_add(mdev->dev,
  737. priv->port,
  738. priv->base_qpn,
  739. MLX4_FS_MC_DEFAULT);
  740. break;
  741. case MLX4_STEERING_MODE_B0:
  742. err = mlx4_multicast_promisc_add(mdev->dev,
  743. priv->base_qpn,
  744. priv->port);
  745. break;
  746. case MLX4_STEERING_MODE_A0:
  747. break;
  748. }
  749. if (err)
  750. en_err(priv, "Failed entering multicast promisc mode\n");
  751. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  752. }
  753. } else {
  754. /* Disable Multicast promisc */
  755. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  756. switch (mdev->dev->caps.steering_mode) {
  757. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  758. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  759. priv->port,
  760. MLX4_FS_MC_DEFAULT);
  761. break;
  762. case MLX4_STEERING_MODE_B0:
  763. err = mlx4_multicast_promisc_remove(mdev->dev,
  764. priv->base_qpn,
  765. priv->port);
  766. break;
  767. case MLX4_STEERING_MODE_A0:
  768. break;
  769. }
  770. if (err)
  771. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  772. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  773. }
  774. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  775. 0, MLX4_MCAST_DISABLE);
  776. if (err)
  777. en_err(priv, "Failed disabling multicast filter\n");
  778. /* Flush mcast filter and init it with broadcast address */
  779. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  780. 1, MLX4_MCAST_CONFIG);
  781. /* Update multicast list - we cache all addresses so they won't
  782. * change while HW is updated holding the command semaphor */
  783. mlx4_en_cache_mclist(dev);
  784. list_for_each_entry(addr_list, &priv->mc_list, list) {
  785. mcast_addr = mlx4_mac_to_u64(addr_list->addr);
  786. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  787. mcast_addr, 0, MLX4_MCAST_CONFIG);
  788. }
  789. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  790. 0, MLX4_MCAST_ENABLE);
  791. if (err)
  792. en_err(priv, "Failed enabling multicast filter\n");
  793. update_addr_list_flags(priv, &priv->curr_mc_list, &priv->mc_list);
  794. list_for_each_entry_safe(addr_list, tmp, &priv->curr_mc_list, list) {
  795. if (addr_list->action == MLX4_ADDR_LIST_REM) {
  796. /* detach this address and delete from list */
  797. memcpy(&mc_list[10], addr_list->addr, ETH_ALEN);
  798. mc_list[5] = priv->port;
  799. err = mlx4_multicast_detach(mdev->dev,
  800. &priv->rss_map.indir_qp,
  801. mc_list,
  802. MLX4_PROT_ETH,
  803. addr_list->reg_id);
  804. if (err)
  805. en_err(priv, "Fail to detach multicast address\n");
  806. if (addr_list->tunnel_reg_id) {
  807. err = mlx4_flow_detach(priv->mdev->dev, addr_list->tunnel_reg_id);
  808. if (err)
  809. en_err(priv, "Failed to detach multicast address\n");
  810. }
  811. /* remove from list */
  812. list_del(&addr_list->list);
  813. kfree(addr_list);
  814. } else if (addr_list->action == MLX4_ADDR_LIST_ADD) {
  815. /* attach the address */
  816. memcpy(&mc_list[10], addr_list->addr, ETH_ALEN);
  817. /* needed for B0 steering support */
  818. mc_list[5] = priv->port;
  819. err = mlx4_multicast_attach(mdev->dev,
  820. &priv->rss_map.indir_qp,
  821. mc_list,
  822. priv->port, 0,
  823. MLX4_PROT_ETH,
  824. &addr_list->reg_id);
  825. if (err)
  826. en_err(priv, "Fail to attach multicast address\n");
  827. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  828. &addr_list->tunnel_reg_id);
  829. if (err)
  830. en_err(priv, "Failed to attach multicast address\n");
  831. }
  832. }
  833. }
  834. }
  835. static void mlx4_en_do_unicast(struct mlx4_en_priv *priv,
  836. struct net_device *dev,
  837. struct mlx4_en_dev *mdev)
  838. {
  839. struct mlx4_en_addr_list *addr_list, *tmp;
  840. int err;
  841. /* Update unicast list */
  842. mlx4_en_cache_uclist(dev);
  843. update_addr_list_flags(priv, &priv->curr_uc_list, &priv->uc_list);
  844. list_for_each_entry_safe(addr_list, tmp, &priv->curr_uc_list, list) {
  845. if (addr_list->action == MLX4_ADDR_LIST_REM) {
  846. mlx4_en_uc_steer_release(priv, addr_list->addr,
  847. priv->rss_map.indir_qp.qpn,
  848. addr_list->reg_id);
  849. /* remove from list */
  850. list_del(&addr_list->list);
  851. kfree(addr_list);
  852. } else if (addr_list->action == MLX4_ADDR_LIST_ADD) {
  853. err = mlx4_en_uc_steer_add(priv, addr_list->addr,
  854. &priv->rss_map.indir_qp.qpn,
  855. &addr_list->reg_id);
  856. if (err)
  857. en_err(priv, "Fail to add unicast address\n");
  858. }
  859. }
  860. }
  861. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  862. {
  863. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  864. rx_mode_task);
  865. struct mlx4_en_dev *mdev = priv->mdev;
  866. struct net_device *dev = priv->dev;
  867. mutex_lock(&mdev->state_lock);
  868. if (!mdev->device_up) {
  869. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  870. goto out;
  871. }
  872. if (!priv->port_up) {
  873. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  874. goto out;
  875. }
  876. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  877. if (priv->port_state.link_state) {
  878. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  879. /* update netif baudrate */
  880. priv->dev->if_baudrate =
  881. IF_Mbps(priv->port_state.link_speed);
  882. /* Important note: the following call for if_link_state_change
  883. * is needed for interface up scenario (start port, link state
  884. * change) */
  885. if_link_state_change(priv->dev, LINK_STATE_UP);
  886. en_dbg(HW, priv, "Link Up\n");
  887. }
  888. }
  889. /* Set unicast rules */
  890. mlx4_en_do_unicast(priv, dev, mdev);
  891. /* Promsicuous mode: disable all filters */
  892. if ((dev->if_flags & IFF_PROMISC) ||
  893. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  894. mlx4_en_set_promisc_mode(priv, mdev);
  895. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  896. /* Not in promiscuous mode */
  897. mlx4_en_clear_promisc_mode(priv, mdev);
  898. }
  899. /* Set multicast rules */
  900. mlx4_en_do_multicast(priv, dev, mdev);
  901. out:
  902. mutex_unlock(&mdev->state_lock);
  903. }
  904. static void mlx4_en_watchdog_timeout(void *arg)
  905. {
  906. struct mlx4_en_priv *priv = arg;
  907. struct mlx4_en_dev *mdev = priv->mdev;
  908. en_dbg(DRV, priv, "Scheduling watchdog\n");
  909. queue_work(mdev->workqueue, &priv->watchdog_task);
  910. if (priv->port_up)
  911. callout_reset(&priv->watchdog_timer, MLX4_EN_WATCHDOG_TIMEOUT,
  912. mlx4_en_watchdog_timeout, priv);
  913. }
  914. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  915. {
  916. struct mlx4_en_cq *cq;
  917. int i;
  918. /* If we haven't received a specific coalescing setting
  919. * (module param), we set the moderation parameters as follows:
  920. * - moder_cnt is set to the number of mtu sized packets to
  921. * satisfy our coalescing target.
  922. * - moder_time is set to a fixed value.
  923. */
  924. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  925. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  926. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  927. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  928. en_dbg(INTR, priv, "Default coalesing params for mtu: %u - "
  929. "rx_frames:%d rx_usecs:%d\n",
  930. (unsigned)priv->dev->if_mtu, priv->rx_frames, priv->rx_usecs);
  931. /* Setup cq moderation params */
  932. for (i = 0; i < priv->rx_ring_num; i++) {
  933. cq = priv->rx_cq[i];
  934. cq->moder_cnt = priv->rx_frames;
  935. cq->moder_time = priv->rx_usecs;
  936. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  937. priv->last_moder_packets[i] = 0;
  938. priv->last_moder_bytes[i] = 0;
  939. }
  940. for (i = 0; i < priv->tx_ring_num; i++) {
  941. cq = priv->tx_cq[i];
  942. cq->moder_cnt = priv->tx_frames;
  943. cq->moder_time = priv->tx_usecs;
  944. }
  945. /* Reset auto-moderation params */
  946. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  947. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  948. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  949. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  950. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  951. priv->adaptive_rx_coal = 1;
  952. priv->last_moder_jiffies = 0;
  953. priv->last_moder_tx_packets = 0;
  954. }
  955. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  956. {
  957. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  958. struct mlx4_en_cq *cq;
  959. unsigned long packets;
  960. unsigned long rate;
  961. unsigned long avg_pkt_size;
  962. unsigned long rx_packets;
  963. unsigned long rx_bytes;
  964. unsigned long rx_pkt_diff;
  965. int moder_time;
  966. int ring, err;
  967. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  968. return;
  969. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  970. spin_lock(&priv->stats_lock);
  971. rx_packets = priv->rx_ring[ring]->packets;
  972. rx_bytes = priv->rx_ring[ring]->bytes;
  973. spin_unlock(&priv->stats_lock);
  974. rx_pkt_diff = ((unsigned long) (rx_packets -
  975. priv->last_moder_packets[ring]));
  976. packets = rx_pkt_diff;
  977. rate = packets * HZ / period;
  978. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  979. priv->last_moder_bytes[ring])) / packets : 0;
  980. /* Apply auto-moderation only when packet rate
  981. * exceeds a rate that it matters */
  982. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  983. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  984. if (rate < priv->pkt_rate_low)
  985. moder_time = priv->rx_usecs_low;
  986. else if (rate > priv->pkt_rate_high)
  987. moder_time = priv->rx_usecs_high;
  988. else
  989. moder_time = (rate - priv->pkt_rate_low) *
  990. (priv->rx_usecs_high - priv->rx_usecs_low) /
  991. (priv->pkt_rate_high - priv->pkt_rate_low) +
  992. priv->rx_usecs_low;
  993. } else {
  994. moder_time = priv->rx_usecs_low;
  995. }
  996. if (moder_time != priv->last_moder_time[ring]) {
  997. priv->last_moder_time[ring] = moder_time;
  998. cq = priv->rx_cq[ring];
  999. cq->moder_time = moder_time;
  1000. cq->moder_cnt = priv->rx_frames;
  1001. err = mlx4_en_set_cq_moder(priv, cq);
  1002. if (err)
  1003. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1004. ring);
  1005. }
  1006. priv->last_moder_packets[ring] = rx_packets;
  1007. priv->last_moder_bytes[ring] = rx_bytes;
  1008. }
  1009. priv->last_moder_jiffies = jiffies;
  1010. }
  1011. static void mlx4_en_do_get_stats(struct work_struct *work)
  1012. {
  1013. struct delayed_work *delay = to_delayed_work(work);
  1014. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1015. stats_task);
  1016. struct mlx4_en_dev *mdev = priv->mdev;
  1017. int err;
  1018. mutex_lock(&mdev->state_lock);
  1019. if (mdev->device_up) {
  1020. if (priv->port_up) {
  1021. if (mlx4_is_slave(mdev->dev))
  1022. err = mlx4_en_get_vport_stats(mdev, priv->port);
  1023. else
  1024. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1025. if (err)
  1026. en_dbg(HW, priv, "Could not update stats\n");
  1027. mlx4_en_auto_moderation(priv);
  1028. }
  1029. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1030. }
  1031. mutex_unlock(&mdev->state_lock);
  1032. }
  1033. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1034. * periodically
  1035. */
  1036. static void mlx4_en_service_task(struct work_struct *work)
  1037. {
  1038. struct delayed_work *delay = to_delayed_work(work);
  1039. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1040. service_task);
  1041. struct mlx4_en_dev *mdev = priv->mdev;
  1042. mutex_lock(&mdev->state_lock);
  1043. if (mdev->device_up) {
  1044. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1045. SERVICE_TASK_DELAY);
  1046. }
  1047. mutex_unlock(&mdev->state_lock);
  1048. }
  1049. static void mlx4_en_linkstate(struct work_struct *work)
  1050. {
  1051. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1052. linkstate_task);
  1053. struct mlx4_en_dev *mdev = priv->mdev;
  1054. int linkstate = priv->link_state;
  1055. mutex_lock(&mdev->state_lock);
  1056. /* If observable port state changed set carrier state and
  1057. * report to system log */
  1058. if (priv->last_link_state != linkstate) {
  1059. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1060. en_info(priv, "Link Down\n");
  1061. if_link_state_change(priv->dev, LINK_STATE_DOWN);
  1062. /* update netif baudrate */
  1063. priv->dev->if_baudrate = 0;
  1064. /* make sure the port is up before notifying the OS.
  1065. * This is tricky since we get here on INIT_PORT and
  1066. * in such case we can't tell the OS the port is up.
  1067. * To solve this there is a call to if_link_state_change
  1068. * in set_rx_mode.
  1069. * */
  1070. } else if (priv->port_up && (linkstate == MLX4_DEV_EVENT_PORT_UP)){
  1071. if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
  1072. en_info(priv, "Query port failed\n");
  1073. priv->dev->if_baudrate =
  1074. IF_Mbps(priv->port_state.link_speed);
  1075. en_info(priv, "Link Up\n");
  1076. if_link_state_change(priv->dev, LINK_STATE_UP);
  1077. }
  1078. }
  1079. priv->last_link_state = linkstate;
  1080. mutex_unlock(&mdev->state_lock);
  1081. }
  1082. int mlx4_en_start_port(struct net_device *dev)
  1083. {
  1084. struct mlx4_en_priv *priv = netdev_priv(dev);
  1085. struct mlx4_en_dev *mdev = priv->mdev;
  1086. struct mlx4_en_cq *cq;
  1087. struct mlx4_en_tx_ring *tx_ring;
  1088. int rx_index = 0;
  1089. int tx_index = 0;
  1090. int err = 0;
  1091. int i;
  1092. int j;
  1093. u8 mc_list[16] = {0};
  1094. if (priv->port_up) {
  1095. en_dbg(DRV, priv, "start port called while port already up\n");
  1096. return 0;
  1097. }
  1098. INIT_LIST_HEAD(&priv->mc_list);
  1099. INIT_LIST_HEAD(&priv->uc_list);
  1100. INIT_LIST_HEAD(&priv->curr_mc_list);
  1101. INIT_LIST_HEAD(&priv->curr_uc_list);
  1102. INIT_LIST_HEAD(&priv->ethtool_list);
  1103. /* Calculate Rx buf size */
  1104. dev->if_mtu = min(dev->if_mtu, priv->max_mtu);
  1105. mlx4_en_calc_rx_buf(dev);
  1106. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_mb_size);
  1107. /* Configure rx cq's and rings */
  1108. err = mlx4_en_activate_rx_rings(priv);
  1109. if (err) {
  1110. en_err(priv, "Failed to activate RX rings\n");
  1111. return err;
  1112. }
  1113. for (i = 0; i < priv->rx_ring_num; i++) {
  1114. cq = priv->rx_cq[i];
  1115. mlx4_en_cq_init_lock(cq);
  1116. err = mlx4_en_activate_cq(priv, cq, i);
  1117. if (err) {
  1118. en_err(priv, "Failed activating Rx CQ\n");
  1119. goto cq_err;
  1120. }
  1121. for (j = 0; j < cq->size; j++)
  1122. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1123. err = mlx4_en_set_cq_moder(priv, cq);
  1124. if (err) {
  1125. en_err(priv, "Failed setting cq moderation parameters");
  1126. mlx4_en_deactivate_cq(priv, cq);
  1127. goto cq_err;
  1128. }
  1129. mlx4_en_arm_cq(priv, cq);
  1130. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1131. ++rx_index;
  1132. }
  1133. /* Set qp number */
  1134. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1135. err = mlx4_en_get_qp(priv);
  1136. if (err) {
  1137. en_err(priv, "Failed getting eth qp\n");
  1138. goto cq_err;
  1139. }
  1140. mdev->mac_removed[priv->port] = 0;
  1141. priv->counter_index =
  1142. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1143. err = mlx4_en_config_rss_steer(priv);
  1144. if (err) {
  1145. en_err(priv, "Failed configuring rss steering\n");
  1146. goto mac_err;
  1147. }
  1148. err = mlx4_en_create_drop_qp(priv);
  1149. if (err)
  1150. goto rss_err;
  1151. /* Configure tx cq's and rings */
  1152. for (i = 0; i < priv->tx_ring_num; i++) {
  1153. /* Configure cq */
  1154. cq = priv->tx_cq[i];
  1155. err = mlx4_en_activate_cq(priv, cq, i);
  1156. if (err) {
  1157. en_err(priv, "Failed activating Tx CQ\n");
  1158. goto tx_err;
  1159. }
  1160. err = mlx4_en_set_cq_moder(priv, cq);
  1161. if (err) {
  1162. en_err(priv, "Failed setting cq moderation parameters");
  1163. mlx4_en_deactivate_cq(priv, cq);
  1164. goto tx_err;
  1165. }
  1166. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1167. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1168. /* Configure ring */
  1169. tx_ring = priv->tx_ring[i];
  1170. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1171. i / priv->num_tx_rings_p_up);
  1172. if (err) {
  1173. en_err(priv, "Failed activating Tx ring %d\n", i);
  1174. mlx4_en_deactivate_cq(priv, cq);
  1175. goto tx_err;
  1176. }
  1177. /* Arm CQ for TX completions */
  1178. mlx4_en_arm_cq(priv, cq);
  1179. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1180. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1181. *((u32 *) (tx_ring->buf + j)) = INIT_OWNER_BIT;
  1182. ++tx_index;
  1183. }
  1184. /* Configure port */
  1185. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1186. priv->rx_mb_size,
  1187. priv->prof->tx_pause,
  1188. priv->prof->tx_ppp,
  1189. priv->prof->rx_pause,
  1190. priv->prof->rx_ppp);
  1191. if (err) {
  1192. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1193. priv->port, err);
  1194. goto tx_err;
  1195. }
  1196. /* Set default qp number */
  1197. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1198. if (err) {
  1199. en_err(priv, "Failed setting default qp numbers\n");
  1200. goto tx_err;
  1201. }
  1202. /* Init port */
  1203. en_dbg(HW, priv, "Initializing port\n");
  1204. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1205. if (err) {
  1206. en_err(priv, "Failed Initializing port\n");
  1207. goto tx_err;
  1208. }
  1209. /* Attach rx QP to bradcast address */
  1210. memset(&mc_list[10], 0xff, ETH_ALEN);
  1211. mc_list[5] = priv->port; /* needed for B0 steering support */
  1212. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1213. priv->port, 0, MLX4_PROT_ETH,
  1214. &priv->broadcast_id))
  1215. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1216. /* Must redo promiscuous mode setup. */
  1217. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1218. /* Schedule multicast task to populate multicast list */
  1219. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1220. priv->port_up = true;
  1221. /* Enable the queues. */
  1222. dev->if_drv_flags &= ~IFF_DRV_OACTIVE;
  1223. dev->if_drv_flags |= IFF_DRV_RUNNING;
  1224. #ifdef CONFIG_DEBUG_FS
  1225. mlx4_en_create_debug_files(priv);
  1226. #endif
  1227. callout_reset(&priv->watchdog_timer, MLX4_EN_WATCHDOG_TIMEOUT,
  1228. mlx4_en_watchdog_timeout, priv);
  1229. return 0;
  1230. tx_err:
  1231. while (tx_index--) {
  1232. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1233. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1234. }
  1235. mlx4_en_destroy_drop_qp(priv);
  1236. rss_err:
  1237. mlx4_en_release_rss_steer(priv);
  1238. mac_err:
  1239. mlx4_en_put_qp(priv);
  1240. cq_err:
  1241. while (rx_index--)
  1242. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1243. for (i = 0; i < priv->rx_ring_num; i++)
  1244. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1245. return err; /* need to close devices */
  1246. }
  1247. void mlx4_en_stop_port(struct net_device *dev)
  1248. {
  1249. struct mlx4_en_priv *priv = netdev_priv(dev);
  1250. struct mlx4_en_dev *mdev = priv->mdev;
  1251. struct mlx4_en_addr_list *addr_list, *tmp;
  1252. int i;
  1253. u8 mc_list[16] = {0};
  1254. if (!priv->port_up) {
  1255. en_dbg(DRV, priv, "stop port called while port already down\n");
  1256. return;
  1257. }
  1258. #ifdef CONFIG_DEBUG_FS
  1259. mlx4_en_delete_debug_files(priv);
  1260. #endif
  1261. /* close port*/
  1262. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1263. /* Set port as not active */
  1264. priv->port_up = false;
  1265. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1266. /* Promsicuous mode */
  1267. if (mdev->dev->caps.steering_mode ==
  1268. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1269. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1270. MLX4_EN_FLAG_MC_PROMISC);
  1271. mlx4_flow_steer_promisc_remove(mdev->dev,
  1272. priv->port,
  1273. MLX4_FS_ALL_DEFAULT);
  1274. mlx4_flow_steer_promisc_remove(mdev->dev,
  1275. priv->port,
  1276. MLX4_FS_MC_DEFAULT);
  1277. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1278. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1279. /* Disable promiscouos mode */
  1280. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1281. priv->port);
  1282. /* Disable Multicast promisc */
  1283. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1284. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1285. priv->port);
  1286. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1287. }
  1288. }
  1289. /* Detach All unicasts */
  1290. list_for_each_entry(addr_list, &priv->curr_uc_list, list) {
  1291. mlx4_en_uc_steer_release(priv, addr_list->addr,
  1292. priv->rss_map.indir_qp.qpn,
  1293. addr_list->reg_id);
  1294. }
  1295. mlx4_en_clear_uclist(dev);
  1296. list_for_each_entry_safe(addr_list, tmp, &priv->curr_uc_list, list) {
  1297. list_del(&addr_list->list);
  1298. kfree(addr_list);
  1299. }
  1300. /* Detach All multicasts */
  1301. memset(&mc_list[10], 0xff, ETH_ALEN);
  1302. mc_list[5] = priv->port; /* needed for B0 steering support */
  1303. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1304. MLX4_PROT_ETH, priv->broadcast_id);
  1305. list_for_each_entry(addr_list, &priv->curr_mc_list, list) {
  1306. memcpy(&mc_list[10], addr_list->addr, ETH_ALEN);
  1307. mc_list[5] = priv->port;
  1308. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1309. mc_list, MLX4_PROT_ETH, addr_list->reg_id);
  1310. }
  1311. mlx4_en_clear_mclist(dev);
  1312. list_for_each_entry_safe(addr_list, tmp, &priv->curr_mc_list, list) {
  1313. list_del(&addr_list->list);
  1314. kfree(addr_list);
  1315. }
  1316. /* Flush multicast filter */
  1317. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1318. mlx4_en_destroy_drop_qp(priv);
  1319. /* Free TX Rings */
  1320. for (i = 0; i < priv->tx_ring_num; i++) {
  1321. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1322. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1323. }
  1324. msleep(10);
  1325. for (i = 0; i < priv->tx_ring_num; i++)
  1326. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1327. /* Free RSS qps */
  1328. mlx4_en_release_rss_steer(priv);
  1329. /* Unregister Mac address for the port */
  1330. mlx4_en_put_qp(priv);
  1331. mdev->mac_removed[priv->port] = 1;
  1332. /* Free RX Rings */
  1333. for (i = 0; i < priv->rx_ring_num; i++) {
  1334. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1335. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1336. mlx4_en_deactivate_cq(priv, cq);
  1337. }
  1338. callout_stop(&priv->watchdog_timer);
  1339. dev->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
  1340. }
  1341. static void mlx4_en_restart(struct work_struct *work)
  1342. {
  1343. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1344. watchdog_task);
  1345. struct mlx4_en_dev *mdev = priv->mdev;
  1346. struct net_device *dev = priv->dev;
  1347. struct mlx4_en_tx_ring *ring;
  1348. int i;
  1349. if (priv->blocked == 0 || priv->port_up == 0)
  1350. return;
  1351. for (i = 0; i < priv->tx_ring_num; i++) {
  1352. int watchdog_time;
  1353. ring = priv->tx_ring[i];
  1354. watchdog_time = READ_ONCE(ring->watchdog_time);
  1355. if (watchdog_time != 0 &&
  1356. time_after(ticks, ring->watchdog_time))
  1357. goto reset;
  1358. }
  1359. return;
  1360. reset:
  1361. priv->port_stats.tx_timeout++;
  1362. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1363. mutex_lock(&mdev->state_lock);
  1364. if (priv->port_up) {
  1365. mlx4_en_stop_port(dev);
  1366. //for (i = 0; i < priv->tx_ring_num; i++)
  1367. // netdev_tx_reset_queue(priv->tx_ring[i]->tx_queue);
  1368. if (mlx4_en_start_port(dev))
  1369. en_err(priv, "Failed restarting port %d\n", priv->port);
  1370. }
  1371. mutex_unlock(&mdev->state_lock);
  1372. }
  1373. static void mlx4_en_clear_stats(struct net_device *dev)
  1374. {
  1375. struct mlx4_en_priv *priv = netdev_priv(dev);
  1376. struct mlx4_en_dev *mdev = priv->mdev;
  1377. int i;
  1378. if (!mlx4_is_slave(mdev->dev))
  1379. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1380. en_dbg(HW, priv, "Failed dumping statistics\n");
  1381. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1382. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1383. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1384. memset(&priv->vport_stats, 0, sizeof(priv->vport_stats));
  1385. for (i = 0; i < priv->tx_ring_num; i++) {
  1386. priv->tx_ring[i]->bytes = 0;
  1387. priv->tx_ring[i]->packets = 0;
  1388. priv->tx_ring[i]->tx_csum = 0;
  1389. priv->tx_ring[i]->oversized_packets = 0;
  1390. }
  1391. for (i = 0; i < priv->rx_ring_num; i++) {
  1392. priv->rx_ring[i]->bytes = 0;
  1393. priv->rx_ring[i]->packets = 0;
  1394. priv->rx_ring[i]->csum_ok = 0;
  1395. priv->rx_ring[i]->csum_none = 0;
  1396. }
  1397. }
  1398. static void mlx4_en_open(void* arg)
  1399. {
  1400. struct mlx4_en_priv *priv;
  1401. struct mlx4_en_dev *mdev;
  1402. struct net_device *dev;
  1403. int err = 0;
  1404. priv = arg;
  1405. mdev = priv->mdev;
  1406. dev = priv->dev;
  1407. mutex_lock(&mdev->state_lock);
  1408. if (!mdev->device_up) {
  1409. en_err(priv, "Cannot open - device down/disabled\n");
  1410. goto out;
  1411. }
  1412. /* Reset HW statistics and SW counters */
  1413. mlx4_en_clear_stats(dev);
  1414. err = mlx4_en_start_port(dev);
  1415. if (err)
  1416. en_err(priv, "Failed starting port:%d\n", priv->port);
  1417. out:
  1418. mutex_unlock(&mdev->state_lock);
  1419. return;
  1420. }
  1421. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1422. {
  1423. int i;
  1424. #ifdef CONFIG_RFS_ACCEL
  1425. if (priv->dev->rx_cpu_rmap) {
  1426. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1427. priv->dev->rx_cpu_rmap = NULL;
  1428. }
  1429. #endif
  1430. for (i = 0; i < priv->tx_ring_num; i++) {
  1431. if (priv->tx_ring && priv->tx_ring[i])
  1432. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1433. if (priv->tx_cq && priv->tx_cq[i])
  1434. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1435. }
  1436. for (i = 0; i < priv->rx_ring_num; i++) {
  1437. if (priv->rx_ring[i])
  1438. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1439. priv->prof->rx_ring_size);
  1440. if (priv->rx_cq[i])
  1441. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1442. }
  1443. if (priv->stat_sysctl != NULL)
  1444. sysctl_ctx_free(&priv->stat_ctx);
  1445. }
  1446. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1447. {
  1448. struct mlx4_en_port_profile *prof = priv->prof;
  1449. int i;
  1450. int node = 0;
  1451. /* Create rx Rings */
  1452. for (i = 0; i < priv->rx_ring_num; i++) {
  1453. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1454. prof->rx_ring_size, i, RX, node))
  1455. goto err;
  1456. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1457. prof->rx_ring_size, node))
  1458. goto err;
  1459. }
  1460. /* Create tx Rings */
  1461. for (i = 0; i < priv->tx_ring_num; i++) {
  1462. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1463. prof->tx_ring_size, i, TX, node))
  1464. goto err;
  1465. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
  1466. prof->tx_ring_size, TXBB_SIZE, node, i))
  1467. goto err;
  1468. }
  1469. #ifdef CONFIG_RFS_ACCEL
  1470. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num);
  1471. if (!priv->dev->rx_cpu_rmap)
  1472. goto err;
  1473. #endif
  1474. /* Re-create stat sysctls in case the number of rings changed. */
  1475. mlx4_en_sysctl_stat(priv);
  1476. return 0;
  1477. err:
  1478. en_err(priv, "Failed to allocate NIC resources\n");
  1479. for (i = 0; i < priv->rx_ring_num; i++) {
  1480. if (priv->rx_ring[i])
  1481. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1482. prof->rx_ring_size);
  1483. if (priv->rx_cq[i])
  1484. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1485. }
  1486. for (i = 0; i < priv->tx_ring_num; i++) {
  1487. if (priv->tx_ring[i])
  1488. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1489. if (priv->tx_cq[i])
  1490. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1491. }
  1492. priv->port_up = false;
  1493. return -ENOMEM;
  1494. }
  1495. struct en_port_attribute {
  1496. struct attribute attr;
  1497. ssize_t (*show)(struct en_port *, struct en_port_attribute *, char *buf);
  1498. ssize_t (*store)(struct en_port *, struct en_port_attribute *, char *buf, size_t count);
  1499. };
  1500. #define PORT_ATTR_RO(_name) \
  1501. struct en_port_attribute en_port_attr_##_name = __ATTR_RO(_name)
  1502. #define EN_PORT_ATTR(_name, _mode, _show, _store) \
  1503. struct en_port_attribute en_port_attr_##_name = __ATTR(_name, _mode, _show, _store)
  1504. void mlx4_en_destroy_netdev(struct net_device *dev)
  1505. {
  1506. struct mlx4_en_priv *priv = netdev_priv(dev);
  1507. struct mlx4_en_dev *mdev = priv->mdev;
  1508. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1509. /* don't allow more IOCTLs */
  1510. priv->gone = 1;
  1511. /* XXX wait a bit to allow IOCTL handlers to complete */
  1512. pause("W", hz);
  1513. if (priv->vlan_attach != NULL)
  1514. EVENTHANDLER_DEREGISTER(vlan_config, priv->vlan_attach);
  1515. if (priv->vlan_detach != NULL)
  1516. EVENTHANDLER_DEREGISTER(vlan_unconfig, priv->vlan_detach);
  1517. mutex_lock(&mdev->state_lock);
  1518. mlx4_en_stop_port(dev);
  1519. mutex_unlock(&mdev->state_lock);
  1520. /* Unregister device - this will close the port if it was up */
  1521. if (priv->registered)
  1522. ether_ifdetach(dev);
  1523. if (priv->allocated)
  1524. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1525. cancel_delayed_work(&priv->stats_task);
  1526. cancel_delayed_work(&priv->service_task);
  1527. /* flush any pending task for this netdev */
  1528. flush_workqueue(mdev->workqueue);
  1529. callout_drain(&priv->watchdog_timer);
  1530. /* Detach the netdev so tasks would not attempt to access it */
  1531. mutex_lock(&mdev->state_lock);
  1532. mdev->pndev[priv->port] = NULL;
  1533. mutex_unlock(&mdev->state_lock);
  1534. mlx4_en_free_resources(priv);
  1535. /* freeing the sysctl conf cannot be called from within mlx4_en_free_resources */
  1536. if (priv->conf_sysctl != NULL)
  1537. sysctl_ctx_free(&priv->conf_ctx);
  1538. kfree(priv->tx_ring);
  1539. kfree(priv->tx_cq);
  1540. kfree(priv);
  1541. if_free(dev);
  1542. }
  1543. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1544. {
  1545. struct mlx4_en_priv *priv = netdev_priv(dev);
  1546. struct mlx4_en_dev *mdev = priv->mdev;
  1547. int err = 0;
  1548. en_dbg(DRV, priv, "Change MTU called - current:%u new:%u\n",
  1549. (unsigned)dev->if_mtu, (unsigned)new_mtu);
  1550. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1551. en_err(priv, "Bad MTU size:%d, max %u.\n", new_mtu,
  1552. priv->max_mtu);
  1553. return -EPERM;
  1554. }
  1555. mutex_lock(&mdev->state_lock);
  1556. dev->if_mtu = new_mtu;
  1557. if (dev->if_drv_flags & IFF_DRV_RUNNING) {
  1558. if (!mdev->device_up) {
  1559. /* NIC is probably restarting - let watchdog task reset
  1560. * * the port */
  1561. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1562. } else {
  1563. mlx4_en_stop_port(dev);
  1564. err = mlx4_en_start_port(dev);
  1565. if (err) {
  1566. en_err(priv, "Failed restarting port:%d\n",
  1567. priv->port);
  1568. queue_work(mdev->workqueue, &priv->watchdog_task);
  1569. }
  1570. }
  1571. }
  1572. mutex_unlock(&mdev->state_lock);
  1573. return 0;
  1574. }
  1575. static int mlx4_en_calc_media(struct mlx4_en_priv *priv)
  1576. {
  1577. int trans_type;
  1578. int active;
  1579. active = IFM_ETHER;
  1580. if (priv->last_link_state == MLX4_DEV_EVENT_PORT_DOWN)
  1581. return (active);
  1582. active |= IFM_FDX;
  1583. trans_type = priv->port_state.transceiver;
  1584. /* XXX I don't know all of the transceiver values. */
  1585. switch (priv->port_state.link_speed) {
  1586. case 100:
  1587. active |= IFM_100_T;
  1588. break;
  1589. case 1000:
  1590. active |= IFM_1000_T;
  1591. break;
  1592. case 10000:
  1593. if (trans_type > 0 && trans_type <= 0xC)
  1594. active |= IFM_10G_SR;
  1595. else if (trans_type == 0x80 || trans_type == 0)
  1596. active |= IFM_10G_CX4;
  1597. break;
  1598. case 40000:
  1599. active |= IFM_40G_CR4;
  1600. break;
  1601. }
  1602. if (priv->prof->tx_pause)
  1603. active |= IFM_ETH_TXPAUSE;
  1604. if (priv->prof->rx_pause)
  1605. active |= IFM_ETH_RXPAUSE;
  1606. return (active);
  1607. }
  1608. static void mlx4_en_media_status(struct ifnet *dev, struct ifmediareq *ifmr)
  1609. {
  1610. struct mlx4_en_priv *priv;
  1611. priv = dev->if_softc;
  1612. ifmr->ifm_status = IFM_AVALID;
  1613. if (priv->last_link_state != MLX4_DEV_EVENT_PORT_DOWN)
  1614. ifmr->ifm_status |= IFM_ACTIVE;
  1615. ifmr->ifm_active = mlx4_en_calc_media(priv);
  1616. return;
  1617. }
  1618. static int mlx4_en_media_change(struct ifnet *dev)
  1619. {
  1620. struct mlx4_en_priv *priv;
  1621. struct ifmedia *ifm;
  1622. int rxpause;
  1623. int txpause;
  1624. int error;
  1625. priv = dev->if_softc;
  1626. ifm = &priv->media;
  1627. rxpause = txpause = 0;
  1628. error = 0;
  1629. if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
  1630. return (EINVAL);
  1631. switch (IFM_SUBTYPE(ifm->ifm_media)) {
  1632. case IFM_AUTO:
  1633. break;
  1634. case IFM_10G_SR:
  1635. case IFM_10G_CX4:
  1636. case IFM_1000_T:
  1637. case IFM_40G_CR4:
  1638. if ((IFM_SUBTYPE(ifm->ifm_media)
  1639. == IFM_SUBTYPE(mlx4_en_calc_media(priv)))
  1640. && (ifm->ifm_media & IFM_FDX))
  1641. break;
  1642. /* Fallthrough */
  1643. default:
  1644. printf("%s: Only auto media type\n", if_name(dev));
  1645. return (EINVAL);
  1646. }
  1647. /* Allow user to set/clear pause */
  1648. if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_RXPAUSE)
  1649. rxpause = 1;
  1650. if (IFM_OPTIONS(ifm->ifm_media) & IFM_ETH_TXPAUSE)
  1651. txpause = 1;
  1652. if (priv->prof->tx_pause != txpause || priv->prof->rx_pause != rxpause) {
  1653. priv->prof->tx_pause = txpause;
  1654. priv->prof->rx_pause = rxpause;
  1655. error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port,
  1656. priv->rx_mb_size + ETHER_CRC_LEN, priv->prof->tx_pause,
  1657. priv->prof->tx_ppp, priv->prof->rx_pause,
  1658. priv->prof->rx_ppp);
  1659. }
  1660. return (error);
  1661. }
  1662. static int mlx4_en_ioctl(struct ifnet *dev, u_long command, caddr_t data)
  1663. {
  1664. struct mlx4_en_priv *priv;
  1665. struct mlx4_en_dev *mdev;
  1666. struct ifreq *ifr;
  1667. int error;
  1668. int mask;
  1669. struct ifrsskey *ifrk;
  1670. const u32 *key;
  1671. struct ifrsshash *ifrh;
  1672. u8 rss_mask;
  1673. error = 0;
  1674. mask = 0;
  1675. priv = dev->if_softc;
  1676. /* check if detaching */
  1677. if (priv == NULL || priv->gone != 0)
  1678. return (ENXIO);
  1679. mdev = priv->mdev;
  1680. ifr = (struct ifreq *) data;
  1681. switch (command) {
  1682. case SIOCSIFMTU:
  1683. error = -mlx4_en_change_mtu(dev, ifr->ifr_mtu);
  1684. break;
  1685. case SIOCSIFFLAGS:
  1686. if (dev->if_flags & IFF_UP) {
  1687. if ((dev->if_drv_flags & IFF_DRV_RUNNING) == 0) {
  1688. mutex_lock(&mdev->state_lock);
  1689. mlx4_en_start_port(dev);
  1690. mutex_unlock(&mdev->state_lock);
  1691. } else {
  1692. mlx4_en_set_rx_mode(dev);
  1693. }
  1694. } else {
  1695. mutex_lock(&mdev->state_lock);
  1696. if (dev->if_drv_flags & IFF_DRV_RUNNING) {
  1697. mlx4_en_stop_port(dev);
  1698. if_link_state_change(dev, LINK_STATE_DOWN);
  1699. }
  1700. mutex_unlock(&mdev->state_lock);
  1701. }
  1702. break;
  1703. case SIOCADDMULTI:
  1704. case SIOCDELMULTI:
  1705. mlx4_en_set_rx_mode(dev);
  1706. break;
  1707. case SIOCSIFMEDIA:
  1708. case SIOCGIFMEDIA:
  1709. error = ifmedia_ioctl(dev, ifr, &priv->media, command);
  1710. break;
  1711. case SIOCSIFCAP:
  1712. mutex_lock(&mdev->state_lock);
  1713. mask = ifr->ifr_reqcap ^ dev->if_capenable;
  1714. if (mask & IFCAP_TXCSUM) {
  1715. dev->if_capenable ^= IFCAP_TXCSUM;
  1716. dev->if_hwassist ^= (CSUM_TCP | CSUM_UDP | CSUM_IP);
  1717. if (IFCAP_TSO4 & dev->if_capenable &&
  1718. !(IFCAP_TXCSUM & dev->if_capenable)) {
  1719. mask &= ~IFCAP_TSO4;
  1720. dev->if_capenable &= ~IFCAP_TSO4;
  1721. dev->if_hwassist &= ~CSUM_IP_TSO;
  1722. if_printf(dev,
  1723. "tso4 disabled due to -txcsum.\n");
  1724. }
  1725. }
  1726. if (mask & IFCAP_TXCSUM_IPV6) {
  1727. dev->if_capenable ^= IFCAP_TXCSUM_IPV6;
  1728. dev->if_hwassist ^= (CSUM_UDP_IPV6 | CSUM_TCP_IPV6);
  1729. if (IFCAP_TSO6 & dev->if_capenable &&
  1730. !(IFCAP_TXCSUM_IPV6 & dev->if_capenable)) {
  1731. mask &= ~IFCAP_TSO6;
  1732. dev->if_capenable &= ~IFCAP_TSO6;
  1733. dev->if_hwassist &= ~CSUM_IP6_TSO;
  1734. if_printf(dev,
  1735. "tso6 disabled due to -txcsum6.\n");
  1736. }
  1737. }
  1738. if (mask & IFCAP_RXCSUM)
  1739. dev->if_capenable ^= IFCAP_RXCSUM;
  1740. if (mask & IFCAP_RXCSUM_IPV6)
  1741. dev->if_capenable ^= IFCAP_RXCSUM_IPV6;
  1742. if (mask & IFCAP_TSO4) {
  1743. if (!(IFCAP_TSO4 & dev->if_capenable) &&
  1744. !(IFCAP_TXCSUM & dev->if_capenable)) {
  1745. if_printf(dev, "enable txcsum first.\n");
  1746. error = EAGAIN;
  1747. goto out;
  1748. }
  1749. dev->if_capenable ^= IFCAP_TSO4;
  1750. dev->if_hwassist ^= CSUM_IP_TSO;
  1751. }
  1752. if (mask & IFCAP_TSO6) {
  1753. if (!(IFCAP_TSO6 & dev->if_capenable) &&
  1754. !(IFCAP_TXCSUM_IPV6 & dev->if_capenable)) {
  1755. if_printf(dev, "enable txcsum6 first.\n");
  1756. error = EAGAIN;
  1757. goto out;
  1758. }
  1759. dev->if_capenable ^= IFCAP_TSO6;
  1760. dev->if_hwassist ^= CSUM_IP6_TSO;
  1761. }
  1762. if (mask & IFCAP_LRO)
  1763. dev->if_capenable ^= IFCAP_LRO;
  1764. if (mask & IFCAP_VLAN_HWTAGGING)
  1765. dev->if_capenable ^= IFCAP_VLAN_HWTAGGING;
  1766. if (mask & IFCAP_VLAN_HWFILTER)
  1767. dev->if_capenable ^= IFCAP_VLAN_HWFILTER;
  1768. if (mask & IFCAP_WOL_MAGIC)
  1769. dev->if_capenable ^= IFCAP_WOL_MAGIC;
  1770. if (dev->if_drv_flags & IFF_DRV_RUNNING)
  1771. mlx4_en_start_port(dev);
  1772. out:
  1773. mutex_unlock(&mdev->state_lock);
  1774. VLAN_CAPABILITIES(dev);
  1775. break;
  1776. #if __FreeBSD_version >= 1100036
  1777. case SIOCGI2C: {
  1778. struct ifi2creq i2c;
  1779. error = copyin(ifr_data_get_ptr(ifr), &i2c, sizeof(i2c));
  1780. if (error)
  1781. break;
  1782. if (i2c.len > sizeof(i2c.data)) {
  1783. error = EINVAL;
  1784. break;
  1785. }
  1786. /*
  1787. * Note that we ignore i2c.addr here. The driver hardcodes
  1788. * the address to 0x50, while standard expects it to be 0xA0.
  1789. */
  1790. error = mlx4_get_module_info(mdev->dev, priv->port,
  1791. i2c.offset, i2c.len, i2c.data);
  1792. if (error < 0) {
  1793. error = -error;
  1794. break;
  1795. }
  1796. error = copyout(&i2c, ifr_data_get_ptr(ifr), sizeof(i2c));
  1797. break;
  1798. }
  1799. #endif
  1800. case SIOCGIFRSSKEY:
  1801. ifrk = (struct ifrsskey *)data;
  1802. ifrk->ifrk_func = RSS_FUNC_TOEPLITZ;
  1803. mutex_lock(&mdev->state_lock);
  1804. key = mlx4_en_get_rss_key(priv, &ifrk->ifrk_keylen);
  1805. if (ifrk->ifrk_keylen > RSS_KEYLEN)
  1806. error = EINVAL;
  1807. else
  1808. memcpy(ifrk->ifrk_key, key, ifrk->ifrk_keylen);
  1809. mutex_unlock(&mdev->state_lock);
  1810. break;
  1811. case SIOCGIFRSSHASH:
  1812. mutex_lock(&mdev->state_lock);
  1813. rss_mask = mlx4_en_get_rss_mask(priv);
  1814. mutex_unlock(&mdev->state_lock);
  1815. ifrh = (struct ifrsshash *)data;
  1816. ifrh->ifrh_func = RSS_FUNC_TOEPLITZ;
  1817. ifrh->ifrh_types = 0;
  1818. if (rss_mask & MLX4_RSS_IPV4)
  1819. ifrh->ifrh_types |= RSS_TYPE_IPV4;
  1820. if (rss_mask & MLX4_RSS_TCP_IPV4)
  1821. ifrh->ifrh_types |= RSS_TYPE_TCP_IPV4;
  1822. if (rss_mask & MLX4_RSS_IPV6)
  1823. ifrh->ifrh_types |= RSS_TYPE_IPV6;
  1824. if (rss_mask & MLX4_RSS_TCP_IPV6)
  1825. ifrh->ifrh_types |= RSS_TYPE_TCP_IPV6;
  1826. if (rss_mask & MLX4_RSS_UDP_IPV4)
  1827. ifrh->ifrh_types |= RSS_TYPE_UDP_IPV4;
  1828. if (rss_mask & MLX4_RSS_UDP_IPV6)
  1829. ifrh->ifrh_types |= RSS_TYPE_UDP_IPV6;
  1830. break;
  1831. default:
  1832. error = ether_ioctl(dev, command, data);
  1833. break;
  1834. }
  1835. return (error);
  1836. }
  1837. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1838. struct mlx4_en_port_profile *prof)
  1839. {
  1840. struct net_device *dev;
  1841. struct mlx4_en_priv *priv;
  1842. uint8_t dev_addr[ETHER_ADDR_LEN];
  1843. int err;
  1844. int i;
  1845. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  1846. dev = priv->dev = if_alloc(IFT_ETHER);
  1847. if (dev == NULL) {
  1848. en_err(priv, "Net device allocation failed\n");
  1849. kfree(priv);
  1850. return -ENOMEM;
  1851. }
  1852. dev->if_softc = priv;
  1853. if_initname(dev, "mlxen", (device_get_unit(
  1854. mdev->pdev->dev.bsddev) * MLX4_MAX_PORTS) + port - 1);
  1855. dev->if_mtu = ETHERMTU;
  1856. dev->if_init = mlx4_en_open;
  1857. dev->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
  1858. dev->if_ioctl = mlx4_en_ioctl;
  1859. dev->if_transmit = mlx4_en_transmit;
  1860. dev->if_qflush = mlx4_en_qflush;
  1861. dev->if_snd.ifq_maxlen = prof->tx_ring_size;
  1862. /*
  1863. * Initialize driver private data
  1864. */
  1865. priv->counter_index = 0xff;
  1866. spin_lock_init(&priv->stats_lock);
  1867. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1868. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1869. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1870. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1871. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  1872. callout_init(&priv->watchdog_timer, 1);
  1873. #ifdef CONFIG_RFS_ACCEL
  1874. INIT_LIST_HEAD(&priv->filters);
  1875. spin_lock_init(&priv->filters_lock);
  1876. #endif
  1877. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1878. priv->dev = dev;
  1879. priv->mdev = mdev;
  1880. priv->ddev = &mdev->pdev->dev;
  1881. priv->prof = prof;
  1882. priv->port = port;
  1883. priv->port_up = false;
  1884. priv->flags = prof->flags;
  1885. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1886. priv->tx_ring_num = prof->tx_ring_num;
  1887. priv->tx_ring = kcalloc(MAX_TX_RINGS,
  1888. sizeof(struct mlx4_en_tx_ring *), GFP_KERNEL);
  1889. if (!priv->tx_ring) {
  1890. err = -ENOMEM;
  1891. goto out;
  1892. }
  1893. priv->tx_cq = kcalloc(sizeof(struct mlx4_en_cq *), MAX_TX_RINGS,
  1894. GFP_KERNEL);
  1895. if (!priv->tx_cq) {
  1896. err = -ENOMEM;
  1897. goto out;
  1898. }
  1899. priv->rx_ring_num = prof->rx_ring_num;
  1900. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1901. priv->mac_index = -1;
  1902. priv->last_ifq_jiffies = 0;
  1903. priv->if_counters_rx_errors = 0;
  1904. priv->if_counters_rx_no_buffer = 0;
  1905. #ifdef CONFIG_MLX4_EN_DCB
  1906. if (!mlx4_is_slave(priv->mdev->dev)) {
  1907. priv->dcbx_cap = DCB_CAP_DCBX_HOST;
  1908. priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
  1909. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  1910. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1911. } else {
  1912. en_info(priv, "QoS disabled - no HW support\n");
  1913. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  1914. }
  1915. }
  1916. #endif
  1917. /* Query for default mac and max mtu */
  1918. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1919. priv->mac = mdev->dev->caps.def_mac[priv->port];
  1920. if (ILLEGAL_MAC(priv->mac)) {
  1921. #if BITS_PER_LONG == 64
  1922. en_err(priv, "Port: %d, invalid mac burned: 0x%lx, quiting\n",
  1923. priv->port, priv->mac);
  1924. #elif BITS_PER_LONG == 32
  1925. en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n",
  1926. priv->port, priv->mac);
  1927. #endif
  1928. err = -EINVAL;
  1929. goto out;
  1930. }
  1931. mlx4_en_sysctl_conf(priv);
  1932. err = mlx4_en_alloc_resources(priv);
  1933. if (err)
  1934. goto out;
  1935. /* Allocate page for receive rings */
  1936. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1937. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1938. if (err) {
  1939. en_err(priv, "Failed to allocate page for rx qps\n");
  1940. goto out;
  1941. }
  1942. priv->allocated = 1;
  1943. /*
  1944. * Set driver features
  1945. */
  1946. dev->if_capabilities |= IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6;
  1947. dev->if_capabilities |= IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING;
  1948. dev->if_capabilities |= IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWFILTER;
  1949. dev->if_capabilities |= IFCAP_LINKSTATE | IFCAP_JUMBO_MTU;
  1950. dev->if_capabilities |= IFCAP_LRO;
  1951. dev->if_capabilities |= IFCAP_HWSTATS;
  1952. if (mdev->LSO_support)
  1953. dev->if_capabilities |= IFCAP_TSO4 | IFCAP_TSO6 | IFCAP_VLAN_HWTSO;
  1954. #if __FreeBSD_version >= 1100000
  1955. /* set TSO limits so that we don't have to drop TX packets */
  1956. dev->if_hw_tsomax = MLX4_EN_TX_MAX_PAYLOAD_SIZE - (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN) /* hdr */;
  1957. dev->if_hw_tsomaxsegcount = MLX4_EN_TX_MAX_MBUF_FRAGS - 1 /* hdr */;
  1958. dev->if_hw_tsomaxsegsize = MLX4_EN_TX_MAX_MBUF_SIZE;
  1959. #endif
  1960. dev->if_capenable = dev->if_capabilities;
  1961. dev->if_hwassist = 0;
  1962. if (dev->if_capenable & (IFCAP_TSO4 | IFCAP_TSO6))
  1963. dev->if_hwassist |= CSUM_TSO;
  1964. if (dev->if_capenable & IFCAP_TXCSUM)
  1965. dev->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP);
  1966. if (dev->if_capenable & IFCAP_TXCSUM_IPV6)
  1967. dev->if_hwassist |= (CSUM_UDP_IPV6 | CSUM_TCP_IPV6);
  1968. /* Register for VLAN events */
  1969. priv->vlan_attach = EVENTHANDLER_REGISTER(vlan_config,
  1970. mlx4_en_vlan_rx_add_vid, priv, EVENTHANDLER_PRI_FIRST);
  1971. priv->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig,
  1972. mlx4_en_vlan_rx_kill_vid, priv, EVENTHANDLER_PRI_FIRST);
  1973. mdev->pndev[priv->port] = dev;
  1974. priv->last_link_state = MLX4_DEV_EVENT_PORT_DOWN;
  1975. mlx4_en_set_default_moderation(priv);
  1976. /* Set default MAC */
  1977. for (i = 0; i < ETHER_ADDR_LEN; i++)
  1978. dev_addr[ETHER_ADDR_LEN - 1 - i] = (u8) (priv->mac >> (8 * i));
  1979. ether_ifattach(dev, dev_addr);
  1980. if_link_state_change(dev, LINK_STATE_DOWN);
  1981. ifmedia_init(&priv->media, IFM_IMASK | IFM_ETH_FMASK,
  1982. mlx4_en_media_change, mlx4_en_media_status);
  1983. ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_1000_T, 0, NULL);
  1984. ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_10G_SR, 0, NULL);
  1985. ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_10G_CX4, 0, NULL);
  1986. ifmedia_add(&priv->media, IFM_ETHER | IFM_FDX | IFM_40G_CR4, 0, NULL);
  1987. ifmedia_add(&priv->media, IFM_ETHER | IFM_AUTO, 0, NULL);
  1988. ifmedia_set(&priv->media, IFM_ETHER | IFM_AUTO);
  1989. NETDUMP_SET(dev, mlx4_en);
  1990. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1991. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1992. priv->registered = 1;
  1993. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1994. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1995. priv->rx_mb_size = dev->if_mtu + ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
  1996. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1997. priv->rx_mb_size,
  1998. prof->tx_pause, prof->tx_ppp,
  1999. prof->rx_pause, prof->rx_ppp);
  2000. if (err) {
  2001. en_err(priv, "Failed setting port general configurations "
  2002. "for port %d, with error %d\n", priv->port, err);
  2003. goto out;
  2004. }
  2005. /* Init port */
  2006. en_warn(priv, "Initializing port\n");
  2007. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2008. if (err) {
  2009. en_err(priv, "Failed Initializing port\n");
  2010. goto out;
  2011. }
  2012. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2013. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2014. queue_delayed_work(mdev->workqueue, &priv->service_task, SERVICE_TASK_DELAY);
  2015. return 0;
  2016. out:
  2017. mlx4_en_destroy_netdev(dev);
  2018. return err;
  2019. }
  2020. static int mlx4_en_set_ring_size(struct net_device *dev,
  2021. int rx_size, int tx_size)
  2022. {
  2023. struct mlx4_en_priv *priv = netdev_priv(dev);
  2024. struct mlx4_en_dev *mdev = priv->mdev;
  2025. int port_up = 0;
  2026. int err = 0;
  2027. rx_size = roundup_pow_of_two(rx_size);
  2028. rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
  2029. rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
  2030. tx_size = roundup_pow_of_two(tx_size);
  2031. tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
  2032. tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
  2033. if (rx_size == (priv->port_up ?
  2034. priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size) &&
  2035. tx_size == priv->tx_ring[0]->size)
  2036. return 0;
  2037. mutex_lock(&mdev->state_lock);
  2038. if (priv->port_up) {
  2039. port_up = 1;
  2040. mlx4_en_stop_port(dev);
  2041. }
  2042. mlx4_en_free_resources(priv);
  2043. priv->prof->tx_ring_size = tx_size;
  2044. priv->prof->rx_ring_size = rx_size;
  2045. err = mlx4_en_alloc_resources(priv);
  2046. if (err) {
  2047. en_err(priv, "Failed reallocating port resources\n");
  2048. goto out;
  2049. }
  2050. if (port_up) {
  2051. err = mlx4_en_start_port(dev);
  2052. if (err)
  2053. en_err(priv, "Failed starting port\n");
  2054. }
  2055. out:
  2056. mutex_unlock(&mdev->state_lock);
  2057. return err;
  2058. }
  2059. static int mlx4_en_set_rx_ring_size(SYSCTL_HANDLER_ARGS)
  2060. {
  2061. struct mlx4_en_priv *priv;
  2062. int size;
  2063. int error;
  2064. priv = arg1;
  2065. size = priv->prof->rx_ring_size;
  2066. error = sysctl_handle_int(oidp, &size, 0, req);
  2067. if (error || !req->newptr)
  2068. return (error);
  2069. error = -mlx4_en_set_ring_size(priv->dev, size,
  2070. priv->prof->tx_ring_size);
  2071. return (error);
  2072. }
  2073. static int mlx4_en_set_tx_ring_size(SYSCTL_HANDLER_ARGS)
  2074. {
  2075. struct mlx4_en_priv *priv;
  2076. int size;
  2077. int error;
  2078. priv = arg1;
  2079. size = priv->prof->tx_ring_size;
  2080. error = sysctl_handle_int(oidp, &size, 0, req);
  2081. if (error || !req->newptr)
  2082. return (error);
  2083. error = -mlx4_en_set_ring_size(priv->dev, priv->prof->rx_ring_size,
  2084. size);
  2085. return (error);
  2086. }
  2087. static int mlx4_en_get_module_info(struct net_device *dev,
  2088. struct ethtool_modinfo *modinfo)
  2089. {
  2090. struct mlx4_en_priv *priv = netdev_priv(dev);
  2091. struct mlx4_en_dev *mdev = priv->mdev;
  2092. int ret;
  2093. u8 data[4];
  2094. /* Read first 2 bytes to get Module & REV ID */
  2095. ret = mlx4_get_module_info(mdev->dev, priv->port,
  2096. 0/*offset*/, 2/*size*/, data);
  2097. if (ret < 2) {
  2098. en_err(priv, "Failed to read eeprom module first two bytes, error: 0x%x\n", -ret);
  2099. return -EIO;
  2100. }
  2101. switch (data[0] /* identifier */) {
  2102. case MLX4_MODULE_ID_QSFP:
  2103. modinfo->type = ETH_MODULE_SFF_8436;
  2104. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  2105. break;
  2106. case MLX4_MODULE_ID_QSFP_PLUS:
  2107. if (data[1] >= 0x3) { /* revision id */
  2108. modinfo->type = ETH_MODULE_SFF_8636;
  2109. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  2110. } else {
  2111. modinfo->type = ETH_MODULE_SFF_8436;
  2112. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  2113. }
  2114. break;
  2115. case MLX4_MODULE_ID_QSFP28:
  2116. modinfo->type = ETH_MODULE_SFF_8636;
  2117. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  2118. break;
  2119. case MLX4_MODULE_ID_SFP:
  2120. modinfo->type = ETH_MODULE_SFF_8472;
  2121. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  2122. break;
  2123. default:
  2124. en_err(priv, "mlx4_en_get_module_info : Not recognized cable type\n");
  2125. return -EINVAL;
  2126. }
  2127. return 0;
  2128. }
  2129. static int mlx4_en_get_module_eeprom(struct net_device *dev,
  2130. struct ethtool_eeprom *ee,
  2131. u8 *data)
  2132. {
  2133. struct mlx4_en_priv *priv = netdev_priv(dev);
  2134. struct mlx4_en_dev *mdev = priv->mdev;
  2135. int offset = ee->offset;
  2136. int i = 0, ret;
  2137. if (ee->len == 0)
  2138. return -EINVAL;
  2139. memset(data, 0, ee->len);
  2140. while (i < ee->len) {
  2141. en_dbg(DRV, priv,
  2142. "mlx4_get_module_info i(%d) offset(%d) len(%d)\n",
  2143. i, offset, ee->len - i);
  2144. ret = mlx4_get_module_info(mdev->dev, priv->port,
  2145. offset, ee->len - i, data + i);
  2146. if (!ret) /* Done reading */
  2147. return 0;
  2148. if (ret < 0) {
  2149. en_err(priv,
  2150. "mlx4_get_module_info i(%d) offset(%d) bytes_to_read(%d) - FAILED (0x%x)\n",
  2151. i, offset, ee->len - i, ret);
  2152. return -1;
  2153. }
  2154. i += ret;
  2155. offset += ret;
  2156. }
  2157. return 0;
  2158. }
  2159. static void mlx4_en_print_eeprom(u8 *data, __u32 len)
  2160. {
  2161. int i;
  2162. int j = 0;
  2163. int row = 0;
  2164. const int NUM_OF_BYTES = 16;
  2165. printf("\nOffset\t\tValues\n");
  2166. printf("------\t\t------\n");
  2167. while(row < len){
  2168. printf("0x%04x\t\t",row);
  2169. for(i=0; i < NUM_OF_BYTES; i++){
  2170. printf("%02x ", data[j]);
  2171. row++;
  2172. j++;
  2173. }
  2174. printf("\n");
  2175. }
  2176. }
  2177. /* Read cable EEPROM module information by first inspecting the first
  2178. * two bytes to get the length and then read the rest of the information.
  2179. * The information is printed to dmesg. */
  2180. static int mlx4_en_read_eeprom(SYSCTL_HANDLER_ARGS)
  2181. {
  2182. u8* data;
  2183. int error;
  2184. int result = 0;
  2185. struct mlx4_en_priv *priv;
  2186. struct net_device *dev;
  2187. struct ethtool_modinfo modinfo;
  2188. struct ethtool_eeprom ee;
  2189. error = sysctl_handle_int(oidp, &result, 0, req);
  2190. if (error || !req->newptr)
  2191. return (error);
  2192. if (result == 1) {
  2193. priv = arg1;
  2194. dev = priv->dev;
  2195. data = kmalloc(PAGE_SIZE, GFP_KERNEL);
  2196. error = mlx4_en_get_module_info(dev, &modinfo);
  2197. if (error) {
  2198. en_err(priv,
  2199. "mlx4_en_get_module_info returned with error - FAILED (0x%x)\n",
  2200. -error);
  2201. goto out;
  2202. }
  2203. ee.len = modinfo.eeprom_len;
  2204. ee.offset = 0;
  2205. error = mlx4_en_get_module_eeprom(dev, &ee, data);
  2206. if (error) {
  2207. en_err(priv,
  2208. "mlx4_en_get_module_eeprom returned with error - FAILED (0x%x)\n",
  2209. -error);
  2210. /* Continue printing partial information in case of an error */
  2211. }
  2212. /* EEPROM information will be printed in dmesg */
  2213. mlx4_en_print_eeprom(data, ee.len);
  2214. out:
  2215. kfree(data);
  2216. }
  2217. /* Return zero to prevent sysctl failure. */
  2218. return (0);
  2219. }
  2220. static int mlx4_en_set_tx_ppp(SYSCTL_HANDLER_ARGS)
  2221. {
  2222. struct mlx4_en_priv *priv;
  2223. int ppp;
  2224. int error;
  2225. priv = arg1;
  2226. ppp = priv->prof->tx_ppp;
  2227. error = sysctl_handle_int(oidp, &ppp, 0, req);
  2228. if (error || !req->newptr)
  2229. return (error);
  2230. if (ppp > 0xff || ppp < 0)
  2231. return (-EINVAL);
  2232. priv->prof->tx_ppp = ppp;
  2233. error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port,
  2234. priv->rx_mb_size + ETHER_CRC_LEN,
  2235. priv->prof->tx_pause,
  2236. priv->prof->tx_ppp,
  2237. priv->prof->rx_pause,
  2238. priv->prof->rx_ppp);
  2239. return (error);
  2240. }
  2241. static int mlx4_en_set_rx_ppp(SYSCTL_HANDLER_ARGS)
  2242. {
  2243. struct mlx4_en_priv *priv;
  2244. struct mlx4_en_dev *mdev;
  2245. int ppp;
  2246. int error;
  2247. int port_up;
  2248. port_up = 0;
  2249. priv = arg1;
  2250. mdev = priv->mdev;
  2251. ppp = priv->prof->rx_ppp;
  2252. error = sysctl_handle_int(oidp, &ppp, 0, req);
  2253. if (error || !req->newptr)
  2254. return (error);
  2255. if (ppp > 0xff || ppp < 0)
  2256. return (-EINVAL);
  2257. /* See if we have to change the number of tx queues. */
  2258. if (!ppp != !priv->prof->rx_ppp) {
  2259. mutex_lock(&mdev->state_lock);
  2260. if (priv->port_up) {
  2261. port_up = 1;
  2262. mlx4_en_stop_port(priv->dev);
  2263. }
  2264. mlx4_en_free_resources(priv);
  2265. priv->prof->rx_ppp = ppp;
  2266. error = -mlx4_en_alloc_resources(priv);
  2267. if (error)
  2268. en_err(priv, "Failed reallocating port resources\n");
  2269. if (error == 0 && port_up) {
  2270. error = -mlx4_en_start_port(priv->dev);
  2271. if (error)
  2272. en_err(priv, "Failed starting port\n");
  2273. }
  2274. mutex_unlock(&mdev->state_lock);
  2275. return (error);
  2276. }
  2277. priv->prof->rx_ppp = ppp;
  2278. error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port,
  2279. priv->rx_mb_size + ETHER_CRC_LEN,
  2280. priv->prof->tx_pause,
  2281. priv->prof->tx_ppp,
  2282. priv->prof->rx_pause,
  2283. priv->prof->rx_ppp);
  2284. return (error);
  2285. }
  2286. static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv)
  2287. {
  2288. struct net_device *dev;
  2289. struct sysctl_ctx_list *ctx;
  2290. struct sysctl_oid *node;
  2291. struct sysctl_oid_list *node_list;
  2292. struct sysctl_oid *coal;
  2293. struct sysctl_oid_list *coal_list;
  2294. const char *pnameunit;
  2295. dev = priv->dev;
  2296. ctx = &priv->conf_ctx;
  2297. pnameunit = device_get_nameunit(priv->mdev->pdev->dev.bsddev);
  2298. sysctl_ctx_init(ctx);
  2299. priv->conf_sysctl = SYSCTL_ADD_NODE(ctx, SYSCTL_STATIC_CHILDREN(_hw),
  2300. OID_AUTO, dev->if_xname, CTLFLAG_RD, 0, "mlx4 10gig ethernet");
  2301. node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(priv->conf_sysctl), OID_AUTO,
  2302. "conf", CTLFLAG_RD, NULL, "Configuration");
  2303. node_list = SYSCTL_CHILDREN(node);
  2304. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "msg_enable",
  2305. CTLFLAG_RW, &priv->msg_enable, 0,
  2306. "Driver message enable bitfield");
  2307. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "rx_rings",
  2308. CTLFLAG_RD, &priv->rx_ring_num, 0,
  2309. "Number of receive rings");
  2310. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_rings",
  2311. CTLFLAG_RD, &priv->tx_ring_num, 0,
  2312. "Number of transmit rings");
  2313. SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_size",
  2314. CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
  2315. mlx4_en_set_rx_ring_size, "I", "Receive ring size");
  2316. SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_size",
  2317. CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
  2318. mlx4_en_set_tx_ring_size, "I", "Transmit ring size");
  2319. SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_ppp",
  2320. CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
  2321. mlx4_en_set_tx_ppp, "I", "TX Per-priority pause");
  2322. SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_ppp",
  2323. CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
  2324. mlx4_en_set_rx_ppp, "I", "RX Per-priority pause");
  2325. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "port_num",
  2326. CTLFLAG_RD, &priv->port, 0,
  2327. "Port Number");
  2328. SYSCTL_ADD_STRING(ctx, node_list, OID_AUTO, "device_name",
  2329. CTLFLAG_RD, __DECONST(void *, pnameunit), 0,
  2330. "PCI device name");
  2331. /* Add coalescer configuration. */
  2332. coal = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO,
  2333. "coalesce", CTLFLAG_RD, NULL, "Interrupt coalesce configuration");
  2334. coal_list = SYSCTL_CHILDREN(coal);
  2335. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "pkt_rate_low",
  2336. CTLFLAG_RW, &priv->pkt_rate_low, 0,
  2337. "Packets per-second for minimum delay");
  2338. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "rx_usecs_low",
  2339. CTLFLAG_RW, &priv->rx_usecs_low, 0,
  2340. "Minimum RX delay in micro-seconds");
  2341. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "pkt_rate_high",
  2342. CTLFLAG_RW, &priv->pkt_rate_high, 0,
  2343. "Packets per-second for maximum delay");
  2344. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "rx_usecs_high",
  2345. CTLFLAG_RW, &priv->rx_usecs_high, 0,
  2346. "Maximum RX delay in micro-seconds");
  2347. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "sample_interval",
  2348. CTLFLAG_RW, &priv->sample_interval, 0,
  2349. "adaptive frequency in units of HZ ticks");
  2350. SYSCTL_ADD_UINT(ctx, coal_list, OID_AUTO, "adaptive_rx_coal",
  2351. CTLFLAG_RW, &priv->adaptive_rx_coal, 0,
  2352. "Enable adaptive rx coalescing");
  2353. /* EEPROM support */
  2354. SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "eeprom_info",
  2355. CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
  2356. mlx4_en_read_eeprom, "I", "EEPROM information");
  2357. }
  2358. static void mlx4_en_sysctl_stat(struct mlx4_en_priv *priv)
  2359. {
  2360. struct sysctl_ctx_list *ctx;
  2361. struct sysctl_oid_list *node_list;
  2362. struct sysctl_oid *ring_node;
  2363. struct sysctl_oid_list *ring_list;
  2364. struct mlx4_en_tx_ring *tx_ring;
  2365. struct mlx4_en_rx_ring *rx_ring;
  2366. char namebuf[128];
  2367. int i;
  2368. ctx = &priv->stat_ctx;
  2369. sysctl_ctx_init(ctx);
  2370. priv->stat_sysctl = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(priv->conf_sysctl), OID_AUTO,
  2371. "stat", CTLFLAG_RD, NULL, "Statistics");
  2372. node_list = SYSCTL_CHILDREN(priv->stat_sysctl);
  2373. #ifdef MLX4_EN_PERF_STAT
  2374. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_poll", CTLFLAG_RD,
  2375. &priv->pstats.tx_poll, "TX Poll calls");
  2376. SYSCTL_ADD_QUAD(ctx, node_list, OID_AUTO, "tx_pktsz_avg", CTLFLAG_RD,
  2377. &priv->pstats.tx_pktsz_avg, "TX average packet size");
  2378. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "inflight_avg", CTLFLAG_RD,
  2379. &priv->pstats.inflight_avg, "TX average packets in-flight");
  2380. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "tx_coal_avg", CTLFLAG_RD,
  2381. &priv->pstats.tx_coal_avg, "TX average coalesced completions");
  2382. SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "rx_coal_avg", CTLFLAG_RD,
  2383. &priv->pstats.rx_coal_avg, "RX average coalesced completions");
  2384. #endif
  2385. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tso_packets", CTLFLAG_RD,
  2386. &priv->port_stats.tso_packets, 0, "TSO packets sent");
  2387. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "queue_stopped", CTLFLAG_RD,
  2388. &priv->port_stats.queue_stopped, 0, "Queue full");
  2389. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "wake_queue", CTLFLAG_RD,
  2390. &priv->port_stats.wake_queue, 0, "Queue resumed after full");
  2391. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_timeout", CTLFLAG_RD,
  2392. &priv->port_stats.tx_timeout, 0, "Transmit timeouts");
  2393. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_oversized_packets", CTLFLAG_RD,
  2394. &priv->port_stats.oversized_packets, 0, "TX oversized packets, m_defrag failed");
  2395. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_alloc_failed", CTLFLAG_RD,
  2396. &priv->port_stats.rx_alloc_failed, 0, "RX failed to allocate mbuf");
  2397. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_chksum_good", CTLFLAG_RD,
  2398. &priv->port_stats.rx_chksum_good, 0, "RX checksum offload success");
  2399. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_chksum_none", CTLFLAG_RD,
  2400. &priv->port_stats.rx_chksum_none, 0, "RX without checksum offload");
  2401. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_chksum_offload",
  2402. CTLFLAG_RD, &priv->port_stats.tx_chksum_offload, 0,
  2403. "TX checksum offloads");
  2404. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "defrag_attempts",
  2405. CTLFLAG_RD, &priv->port_stats.defrag_attempts, 0,
  2406. "Oversized chains defragged");
  2407. /* Could strdup the names and add in a loop. This is simpler. */
  2408. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_bytes", CTLFLAG_RD,
  2409. &priv->pkstats.rx_bytes, 0, "RX Bytes");
  2410. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_packets", CTLFLAG_RD,
  2411. &priv->pkstats.rx_packets, 0, "RX packets");
  2412. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_multicast_packets", CTLFLAG_RD,
  2413. &priv->pkstats.rx_multicast_packets, 0, "RX Multicast Packets");
  2414. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_broadcast_packets", CTLFLAG_RD,
  2415. &priv->pkstats.rx_broadcast_packets, 0, "RX Broadcast Packets");
  2416. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_errors", CTLFLAG_RD,
  2417. &priv->pkstats.rx_errors, 0, "RX Errors");
  2418. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_dropped", CTLFLAG_RD,
  2419. &priv->pkstats.rx_dropped, 0, "RX Dropped");
  2420. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_length_errors", CTLFLAG_RD,
  2421. &priv->pkstats.rx_length_errors, 0, "RX Length Errors");
  2422. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_over_errors", CTLFLAG_RD,
  2423. &priv->pkstats.rx_over_errors, 0, "RX Over Errors");
  2424. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_crc_errors", CTLFLAG_RD,
  2425. &priv->pkstats.rx_crc_errors, 0, "RX CRC Errors");
  2426. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_jabbers", CTLFLAG_RD,
  2427. &priv->pkstats.rx_jabbers, 0, "RX Jabbers");
  2428. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_in_range_length_error", CTLFLAG_RD,
  2429. &priv->pkstats.rx_in_range_length_error, 0, "RX IN_Range Length Error");
  2430. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_out_range_length_error",
  2431. CTLFLAG_RD, &priv->pkstats.rx_out_range_length_error, 0,
  2432. "RX Out Range Length Error");
  2433. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_lt_64_bytes_packets", CTLFLAG_RD,
  2434. &priv->pkstats.rx_lt_64_bytes_packets, 0, "RX Lt 64 Bytes Packets");
  2435. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_127_bytes_packets", CTLFLAG_RD,
  2436. &priv->pkstats.rx_127_bytes_packets, 0, "RX 127 bytes Packets");
  2437. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_255_bytes_packets", CTLFLAG_RD,
  2438. &priv->pkstats.rx_255_bytes_packets, 0, "RX 255 bytes Packets");
  2439. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_511_bytes_packets", CTLFLAG_RD,
  2440. &priv->pkstats.rx_511_bytes_packets, 0, "RX 511 bytes Packets");
  2441. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_1023_bytes_packets", CTLFLAG_RD,
  2442. &priv->pkstats.rx_1023_bytes_packets, 0, "RX 1023 bytes Packets");
  2443. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_1518_bytes_packets", CTLFLAG_RD,
  2444. &priv->pkstats.rx_1518_bytes_packets, 0, "RX 1518 bytes Packets");
  2445. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_1522_bytes_packets", CTLFLAG_RD,
  2446. &priv->pkstats.rx_1522_bytes_packets, 0, "RX 1522 bytes Packets");
  2447. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_1548_bytes_packets", CTLFLAG_RD,
  2448. &priv->pkstats.rx_1548_bytes_packets, 0, "RX 1548 bytes Packets");
  2449. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "rx_gt_1548_bytes_packets", CTLFLAG_RD,
  2450. &priv->pkstats.rx_gt_1548_bytes_packets, 0,
  2451. "RX Greater Then 1548 bytes Packets");
  2452. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_packets", CTLFLAG_RD,
  2453. &priv->pkstats.tx_packets, 0, "TX packets");
  2454. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_bytes", CTLFLAG_RD,
  2455. &priv->pkstats.tx_bytes, 0, "TX Bytes");
  2456. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_multicast_packets", CTLFLAG_RD,
  2457. &priv->pkstats.tx_multicast_packets, 0, "TX Multicast Packets");
  2458. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_broadcast_packets", CTLFLAG_RD,
  2459. &priv->pkstats.tx_broadcast_packets, 0, "TX Broadcast Packets");
  2460. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_errors", CTLFLAG_RD,
  2461. &priv->pkstats.tx_errors, 0, "TX Errors");
  2462. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_dropped", CTLFLAG_RD,
  2463. &priv->pkstats.tx_dropped, 0, "TX Dropped");
  2464. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_lt_64_bytes_packets", CTLFLAG_RD,
  2465. &priv->pkstats.tx_lt_64_bytes_packets, 0, "TX Less Then 64 Bytes Packets");
  2466. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_127_bytes_packets", CTLFLAG_RD,
  2467. &priv->pkstats.tx_127_bytes_packets, 0, "TX 127 Bytes Packets");
  2468. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_255_bytes_packets", CTLFLAG_RD,
  2469. &priv->pkstats.tx_255_bytes_packets, 0, "TX 255 Bytes Packets");
  2470. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_511_bytes_packets", CTLFLAG_RD,
  2471. &priv->pkstats.tx_511_bytes_packets, 0, "TX 511 Bytes Packets");
  2472. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_1023_bytes_packets", CTLFLAG_RD,
  2473. &priv->pkstats.tx_1023_bytes_packets, 0, "TX 1023 Bytes Packets");
  2474. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_1518_bytes_packets", CTLFLAG_RD,
  2475. &priv->pkstats.tx_1518_bytes_packets, 0, "TX 1518 Bytes Packets");
  2476. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_1522_bytes_packets", CTLFLAG_RD,
  2477. &priv->pkstats.tx_1522_bytes_packets, 0, "TX 1522 Bytes Packets");
  2478. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_1548_bytes_packets", CTLFLAG_RD,
  2479. &priv->pkstats.tx_1548_bytes_packets, 0, "TX 1548 Bytes Packets");
  2480. SYSCTL_ADD_U64(ctx, node_list, OID_AUTO, "tx_gt_1548_bytes_packets", CTLFLAG_RD,
  2481. &priv->pkstats.tx_gt_1548_bytes_packets, 0,
  2482. "TX Greater Then 1548 Bytes Packets");
  2483. for (i = 0; i < priv->tx_ring_num; i++) {
  2484. tx_ring = priv->tx_ring[i];
  2485. snprintf(namebuf, sizeof(namebuf), "tx_ring%d", i);
  2486. ring_node = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO, namebuf,
  2487. CTLFLAG_RD, NULL, "TX Ring");
  2488. ring_list = SYSCTL_CHILDREN(ring_node);
  2489. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "packets",
  2490. CTLFLAG_RD, &tx_ring->packets, 0, "TX packets");
  2491. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "bytes",
  2492. CTLFLAG_RD, &tx_ring->bytes, 0, "TX bytes");
  2493. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "tso_packets",
  2494. CTLFLAG_RD, &tx_ring->tso_packets, 0, "TSO packets");
  2495. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "defrag_attempts",
  2496. CTLFLAG_RD, &tx_ring->defrag_attempts, 0,
  2497. "Oversized chains defragged");
  2498. }
  2499. for (i = 0; i < priv->rx_ring_num; i++) {
  2500. rx_ring = priv->rx_ring[i];
  2501. snprintf(namebuf, sizeof(namebuf), "rx_ring%d", i);
  2502. ring_node = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO, namebuf,
  2503. CTLFLAG_RD, NULL, "RX Ring");
  2504. ring_list = SYSCTL_CHILDREN(ring_node);
  2505. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "packets",
  2506. CTLFLAG_RD, &rx_ring->packets, 0, "RX packets");
  2507. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "bytes",
  2508. CTLFLAG_RD, &rx_ring->bytes, 0, "RX bytes");
  2509. SYSCTL_ADD_U64(ctx, ring_list, OID_AUTO, "error",
  2510. CTLFLAG_RD, &rx_ring->errors, 0, "RX soft errors");
  2511. }
  2512. }
  2513. #ifdef NETDUMP
  2514. static void
  2515. mlx4_en_netdump_init(struct ifnet *dev, int *nrxr, int *ncl, int *clsize)
  2516. {
  2517. struct mlx4_en_priv *priv;
  2518. priv = if_getsoftc(dev);
  2519. mutex_lock(&priv->mdev->state_lock);
  2520. *nrxr = priv->rx_ring_num;
  2521. *ncl = NETDUMP_MAX_IN_FLIGHT;
  2522. *clsize = priv->rx_mb_size;
  2523. mutex_unlock(&priv->mdev->state_lock);
  2524. }
  2525. static void
  2526. mlx4_en_netdump_event(struct ifnet *dev, enum netdump_ev event)
  2527. {
  2528. }
  2529. static int
  2530. mlx4_en_netdump_transmit(struct ifnet *dev, struct mbuf *m)
  2531. {
  2532. struct mlx4_en_priv *priv;
  2533. int err;
  2534. priv = if_getsoftc(dev);
  2535. if ((if_getdrvflags(dev) & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
  2536. IFF_DRV_RUNNING || !priv->link_state)
  2537. return (ENOENT);
  2538. err = mlx4_en_xmit(priv, 0, &m);
  2539. if (err != 0 && m != NULL)
  2540. m_freem(m);
  2541. return (err);
  2542. }
  2543. static int
  2544. mlx4_en_netdump_poll(struct ifnet *dev, int count)
  2545. {
  2546. struct mlx4_en_priv *priv;
  2547. priv = if_getsoftc(dev);
  2548. if ((if_getdrvflags(dev) & IFF_DRV_RUNNING) == 0 || !priv->link_state)
  2549. return (ENOENT);
  2550. mlx4_poll_interrupts(priv->mdev->dev);
  2551. return (0);
  2552. }
  2553. #endif /* NETDUMP */